net/mlx5: fix errno typos in comments
[dpdk.git] / drivers / net / sfc / sfc_ethdev.c
index 2865508..2675d4a 100644 (file)
@@ -96,17 +96,17 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 
        /* Autonegotiation may be disabled */
        dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
-       if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX)
+       if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_1000FDX))
                dev_info->speed_capa |= ETH_LINK_SPEED_1G;
-       if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX)
+       if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_10000FDX))
                dev_info->speed_capa |= ETH_LINK_SPEED_10G;
-       if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_25000FDX)
+       if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_25000FDX))
                dev_info->speed_capa |= ETH_LINK_SPEED_25G;
-       if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX)
+       if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_40000FDX))
                dev_info->speed_capa |= ETH_LINK_SPEED_40G;
-       if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_50000FDX)
+       if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_50000FDX))
                dev_info->speed_capa |= ETH_LINK_SPEED_50G;
-       if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_100000FDX)
+       if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_100000FDX))
                dev_info->speed_capa |= ETH_LINK_SPEED_100G;
 
        dev_info->max_rx_queues = sa->rxq_max;
@@ -153,21 +153,21 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
        }
 
        /* Initialize to hardware limits */
-       dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
-       dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
+       dev_info->rx_desc_lim.nb_max = sa->rxq_max_entries;
+       dev_info->rx_desc_lim.nb_min = sa->rxq_min_entries;
        /* The RXQ hardware requires that the descriptor count is a power
         * of 2, but rx_desc_lim cannot properly describe that constraint.
         */
-       dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
+       dev_info->rx_desc_lim.nb_align = sa->rxq_min_entries;
 
        /* Initialize to hardware limits */
        dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
-       dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
+       dev_info->tx_desc_lim.nb_min = sa->txq_min_entries;
        /*
         * The TXQ hardware requires that the descriptor count is a power
         * of 2, but tx_desc_lim cannot properly describe that constraint
         */
-       dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
+       dev_info->tx_desc_lim.nb_align = sa->txq_min_entries;
 
        if (sap->dp_rx->get_dev_info != NULL)
                sap->dp_rx->get_dev_info(dev_info);