/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
* Copyright(c) 2016-2019 Solarflare Communications Inc.
*
* This software was jointly developed between OKTET Labs (under contract
return evq->sa->priv.dp_rx->qrx_ev(dp_rxq, id);
}
+static boolean_t
+sfc_ev_nop_rx_packets(void *arg, uint32_t label, unsigned int num_packets,
+ uint32_t flags)
+{
+ struct sfc_evq *evq = arg;
+
+ sfc_err(evq->sa,
+ "EVQ %u unexpected Rx packets event label=%u num=%u flags=%#x",
+ evq->evq_index, label, num_packets, flags);
+ return B_TRUE;
+}
+
+static boolean_t
+sfc_ev_dp_rx_packets(void *arg, __rte_unused uint32_t label,
+ unsigned int num_packets, __rte_unused uint32_t flags)
+{
+ struct sfc_evq *evq = arg;
+ struct sfc_dp_rxq *dp_rxq;
+
+ dp_rxq = evq->dp_rxq;
+ SFC_ASSERT(dp_rxq != NULL);
+
+ SFC_ASSERT(evq->sa->priv.dp_rx->qrx_ev != NULL);
+ return evq->sa->priv.dp_rx->qrx_ev(dp_rxq, num_packets);
+}
+
static boolean_t
sfc_ev_nop_rx_ps(void *arg, uint32_t label, uint32_t id,
uint32_t pkt_count, uint16_t flags)
return evq->sa->priv.dp_tx->qtx_ev(dp_txq, id);
}
+static boolean_t
+sfc_ev_nop_tx_ndescs(void *arg, uint32_t label, unsigned int ndescs)
+{
+ struct sfc_evq *evq = arg;
+
+ sfc_err(evq->sa, "EVQ %u unexpected Tx event label=%u ndescs=%#x",
+ evq->evq_index, label, ndescs);
+ return B_TRUE;
+}
+
+static boolean_t
+sfc_ev_dp_tx_ndescs(void *arg, __rte_unused uint32_t label,
+ unsigned int ndescs)
+{
+ struct sfc_evq *evq = arg;
+ struct sfc_dp_txq *dp_txq;
+
+ dp_txq = evq->dp_txq;
+ SFC_ASSERT(dp_txq != NULL);
+
+ SFC_ASSERT(evq->sa->priv.dp_tx->qtx_ev != NULL);
+ return evq->sa->priv.dp_tx->qtx_ev(dp_txq, ndescs);
+}
+
static boolean_t
sfc_ev_exception(void *arg, uint32_t code, __rte_unused uint32_t data)
{
static const efx_ev_callbacks_t sfc_ev_callbacks = {
.eec_initialized = sfc_ev_initialized,
.eec_rx = sfc_ev_nop_rx,
+ .eec_rx_packets = sfc_ev_nop_rx_packets,
.eec_rx_ps = sfc_ev_nop_rx_ps,
.eec_tx = sfc_ev_nop_tx,
+ .eec_tx_ndescs = sfc_ev_nop_tx_ndescs,
.eec_exception = sfc_ev_exception,
.eec_rxq_flush_done = sfc_ev_nop_rxq_flush_done,
.eec_rxq_flush_failed = sfc_ev_nop_rxq_flush_failed,
static const efx_ev_callbacks_t sfc_ev_callbacks_efx_rx = {
.eec_initialized = sfc_ev_initialized,
.eec_rx = sfc_ev_efx_rx,
+ .eec_rx_packets = sfc_ev_nop_rx_packets,
.eec_rx_ps = sfc_ev_nop_rx_ps,
.eec_tx = sfc_ev_nop_tx,
+ .eec_tx_ndescs = sfc_ev_nop_tx_ndescs,
.eec_exception = sfc_ev_exception,
.eec_rxq_flush_done = sfc_ev_rxq_flush_done,
.eec_rxq_flush_failed = sfc_ev_rxq_flush_failed,
static const efx_ev_callbacks_t sfc_ev_callbacks_dp_rx = {
.eec_initialized = sfc_ev_initialized,
.eec_rx = sfc_ev_dp_rx,
+ .eec_rx_packets = sfc_ev_dp_rx_packets,
.eec_rx_ps = sfc_ev_dp_rx_ps,
.eec_tx = sfc_ev_nop_tx,
+ .eec_tx_ndescs = sfc_ev_nop_tx_ndescs,
.eec_exception = sfc_ev_exception,
.eec_rxq_flush_done = sfc_ev_rxq_flush_done,
.eec_rxq_flush_failed = sfc_ev_rxq_flush_failed,
static const efx_ev_callbacks_t sfc_ev_callbacks_efx_tx = {
.eec_initialized = sfc_ev_initialized,
.eec_rx = sfc_ev_nop_rx,
+ .eec_rx_packets = sfc_ev_nop_rx_packets,
.eec_rx_ps = sfc_ev_nop_rx_ps,
.eec_tx = sfc_ev_tx,
+ .eec_tx_ndescs = sfc_ev_nop_tx_ndescs,
.eec_exception = sfc_ev_exception,
.eec_rxq_flush_done = sfc_ev_nop_rxq_flush_done,
.eec_rxq_flush_failed = sfc_ev_nop_rxq_flush_failed,
static const efx_ev_callbacks_t sfc_ev_callbacks_dp_tx = {
.eec_initialized = sfc_ev_initialized,
.eec_rx = sfc_ev_nop_rx,
+ .eec_rx_packets = sfc_ev_nop_rx_packets,
.eec_rx_ps = sfc_ev_nop_rx_ps,
.eec_tx = sfc_ev_dp_tx,
+ .eec_tx_ndescs = sfc_ev_dp_tx_ndescs,
.eec_exception = sfc_ev_exception,
.eec_rxq_flush_done = sfc_ev_nop_rxq_flush_done,
.eec_rxq_flush_failed = sfc_ev_nop_rxq_flush_failed,
int rc;
if (evq->dp_rxq != NULL) {
- unsigned int rxq_sw_index;
+ sfc_sw_index_t rxq_sw_index;
rxq_sw_index = evq->dp_rxq->dpq.queue_id;
}
if (evq->dp_txq != NULL) {
- unsigned int txq_sw_index;
+ sfc_sw_index_t txq_sw_index;
txq_sw_index = evq->dp_txq->dpq.queue_id;
struct sfc_adapter *sa = evq->sa;
efsys_mem_t *esmp;
uint32_t evq_flags = sa->evq_flags;
+ uint32_t irq = 0;
unsigned int total_delay_us;
unsigned int delay_us;
int rc;
(void)memset((void *)esmp->esm_base, 0xff,
efx_evq_size(sa->nic, evq->entries, evq_flags));
- if ((sa->intr.lsc_intr && hw_index == sa->mgmt_evq_index) ||
- (sa->intr.rxq_intr && evq->dp_rxq != NULL))
+ if (sa->intr.lsc_intr && hw_index == sa->mgmt_evq_index) {
evq_flags |= EFX_EVQ_FLAGS_NOTIFY_INTERRUPT;
- else
+ irq = 0;
+ } else if (sa->intr.rxq_intr && evq->dp_rxq != NULL) {
+ sfc_ethdev_qid_t ethdev_qid;
+
+ ethdev_qid =
+ sfc_ethdev_rx_qid_by_rxq_sw_index(sfc_sa2shared(sa),
+ evq->dp_rxq->dpq.queue_id);
+ if (ethdev_qid != SFC_ETHDEV_QID_INVALID) {
+ evq_flags |= EFX_EVQ_FLAGS_NOTIFY_INTERRUPT;
+ /*
+ * The first interrupt is used for management EvQ
+ * (LSC etc). RxQ interrupts follow it.
+ */
+ irq = 1 + ethdev_qid;
+ } else {
+ evq_flags |= EFX_EVQ_FLAGS_NOTIFY_DISABLED;
+ }
+ } else {
evq_flags |= EFX_EVQ_FLAGS_NOTIFY_DISABLED;
+ }
evq->init_state = SFC_EVQ_STARTING;
/* Create the common code event queue */
- rc = efx_ev_qcreate(sa->nic, hw_index, esmp, evq->entries,
- 0 /* unused on EF10 */, 0, evq_flags,
- &evq->common);
+ rc = efx_ev_qcreate_irq(sa->nic, hw_index, esmp, evq->entries,
+ 0 /* unused on EF10 */, 0, evq_flags,
+ irq, &evq->common);
if (rc != 0)
goto fail_ev_qcreate;
/* Allocate DMA space */
rc = sfc_dma_alloc(sa, sfc_evq_type2str(type), type_index,
+ EFX_NIC_DMA_ADDR_EVENT_RING,
efx_evq_size(sa->nic, evq->entries, sa->evq_flags),
socket_id, &evq->mem);
if (rc != 0)
goto fail_kvarg_perf_profile;
}
- sa->mgmt_evq_index = 0;
+ sa->mgmt_evq_index = sfc_mgmt_evq_sw_index(sfc_sa2shared(sa));
rte_spinlock_init(&sa->mgmt_evq_lock);
rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_MGMT, 0, sa->evq_min_entries,