net/bnxt: refactor async event handling

[dpdk.git] / drivers / net / sfc / sfc_mae.h

diff --git a/drivers/net/sfc/sfc_mae.h b/drivers/net/sfc/sfc_mae.h
index aa1b63b..0241fe3 100644 (file)
--- a/drivers/net/sfc/sfc_mae.h
+++ b/drivers/net/sfc/sfc_mae.h
@@ -27,6 +27,7 @@ struct sfc_mae_fw_rsrc {
        union {
                efx_mae_aset_id_t       aset_id;
                efx_mae_rule_id_t       rule_id;
+               efx_mae_eh_id_t         eh_id;
        };
 };
 
@@ -41,11 +42,24 @@ struct sfc_mae_outer_rule {
 
 TAILQ_HEAD(sfc_mae_outer_rules, sfc_mae_outer_rule);
 
+/** Encap. header registry entry */
+struct sfc_mae_encap_header {
+       TAILQ_ENTRY(sfc_mae_encap_header)       entries;
+       unsigned int                            refcnt;
+       uint8_t                                 *buf;
+       size_t                                  size;
+       efx_tunnel_protocol_t                   type;
+       struct sfc_mae_fw_rsrc                  fw_rsrc;
+};
+
+TAILQ_HEAD(sfc_mae_encap_headers, sfc_mae_encap_header);
+
 /** Action set registry entry */
 struct sfc_mae_action_set {
        TAILQ_ENTRY(sfc_mae_action_set) entries;
        unsigned int                    refcnt;
        efx_mae_actions_t               *spec;
+       struct sfc_mae_encap_header     *encap_header;
        struct sfc_mae_fw_rsrc          fw_rsrc;
 };
 
@@ -58,6 +72,17 @@ enum sfc_mae_status {
        SFC_MAE_STATUS_SUPPORTED
 };
 
+/*
+ * Encap. header bounce buffer. It is used to store header data
+ * when parsing the header definition in the action VXLAN_ENCAP.
+ */
+struct sfc_mae_bounce_eh {
+       uint8_t                         *buf;
+       size_t                          buf_size;
+       size_t                          size;
+       efx_tunnel_protocol_t           type;
+};
+
 struct sfc_mae {
        /** Assigned switch domain identifier */
        uint16_t                        switch_domain_id;
@@ -73,8 +98,12 @@ struct sfc_mae {
        uint32_t                        encap_types_supported;
        /** Outer rule registry */
        struct sfc_mae_outer_rules      outer_rules;
+       /** Encap. header registry */
+       struct sfc_mae_encap_headers    encap_headers;
        /** Action set registry */
        struct sfc_mae_action_sets      action_sets;
+       /** Encap. header bounce buffer */
+       struct sfc_mae_bounce_eh        bounce_eh;
 };
 
 struct sfc_adapter;
@@ -101,12 +130,14 @@ struct sfc_mae_pattern_data {
         *
         * - If an item ETH is followed by a single item VLAN,
         *   the former must have "type" set to one of supported
-        *   TPID values (0x8100, 0x88a8, 0x9100, 0x9200, 0x9300).
+        *   TPID values (0x8100, 0x88a8, 0x9100, 0x9200, 0x9300),
+        *   or 0x0000/0x0000.
         *
         * - If an item ETH is followed by two items VLAN, the
         *   item ETH must have "type" set to one of supported TPID
-        *   values (0x88a8, 0x9100, 0x9200, 0x9300), and the outermost
-        *   VLAN item must have "inner_type" set to TPID value 0x8100.
+        *   values (0x88a8, 0x9100, 0x9200, 0x9300), or 0x0000/0x0000,
+        *   and the outermost VLAN item must have "inner_type" set
+        *   to TPID value 0x8100, or 0x0000/0x0000
         *
         * - If a L2 item is followed by a L3 one, the former must
         *   indicate "type" ("inner_type") which corresponds to
@@ -127,6 +158,9 @@ struct sfc_mae_pattern_data {
         * VLAN (L3 EtherType)  --> ETHER_TYPE_BE
         */
        struct sfc_mae_ethertype        ethertypes[SFC_MAE_L2_MAX_NITEMS];
+
+       rte_be16_t                      tci_masks[SFC_MAE_MATCH_VLAN_MAX_NTAGS];
+
        unsigned int                    nb_vlan_tags;
 
        /**
@@ -162,6 +196,14 @@ struct sfc_mae_pattern_data {
         */
        uint8_t                         l3_next_proto_restriction_value;
        uint8_t                         l3_next_proto_restriction_mask;
+
+       /* Projected state of EFX_MAE_FIELD_HAS_OVLAN match bit */
+       bool                            has_ovlan_value;
+       bool                            has_ovlan_mask;
+
+       /* Projected state of EFX_MAE_FIELD_HAS_IVLAN match bit */
+       bool                            has_ivlan_value;
+       bool                            has_ivlan_mask;
 };
 
 struct sfc_mae_parse_ctx {
@@ -197,7 +239,7 @@ int sfc_mae_rule_parse_pattern(struct sfc_adapter *sa,
                               struct rte_flow_error *error);
 int sfc_mae_rule_parse_actions(struct sfc_adapter *sa,
                               const struct rte_flow_action actions[],
-                              struct sfc_mae_action_set **action_setp,
+                              struct sfc_flow_spec_mae *spec_mae,
                               struct rte_flow_error *error);
 sfc_flow_verify_cb_t sfc_mae_flow_verify;
 sfc_flow_insert_cb_t sfc_mae_flow_insert;