/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright (c) 2016-2018 Solarflare Communications Inc.
- * All rights reserved.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
+ * Copyright(c) 2016-2019 Solarflare Communications Inc.
*
* This software was jointly developed between OKTET Labs (under contract
* for Solarflare) and Solarflare Communications, Inc.
rxq_info->state &= ~SFC_RXQ_FLUSHING;
}
+static int
+sfc_efx_rx_qprime(struct sfc_efx_rxq *rxq)
+{
+ int rc = 0;
+
+ if (rxq->evq->read_ptr_primed != rxq->evq->read_ptr) {
+ rc = efx_ev_qprime(rxq->evq->common, rxq->evq->read_ptr);
+ if (rc == 0)
+ rxq->evq->read_ptr_primed = rxq->evq->read_ptr;
+ }
+ return rc;
+}
+
static void
sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq)
{
++i, id = (id + 1) & rxq->ptr_mask) {
m = objs[i];
- MBUF_RAW_ALLOC_CHECK(m);
+ __rte_mbuf_raw_sanity_check(m);
rxd = &rxq->sw_desc[id];
rxd->mbuf = m;
sfc_efx_rx_qrefill(rxq);
+ if (rxq->flags & SFC_EFX_RXQ_FLAG_INTR_EN)
+ sfc_efx_rx_qprime(rxq);
+
return done_pkts;
}
boolean_t
sfc_rx_check_scatter(size_t pdu, size_t rx_buf_size, uint32_t rx_prefix_size,
- boolean_t rx_scatter_enabled, const char **error)
+ boolean_t rx_scatter_enabled, uint32_t rx_scatter_max,
+ const char **error)
{
- if ((rx_buf_size < pdu + rx_prefix_size) && !rx_scatter_enabled) {
- *error = "Rx scatter is disabled and RxQ mbuf pool object size is too small";
+ uint32_t effective_rx_scatter_max;
+ uint32_t rx_scatter_bufs;
+
+ effective_rx_scatter_max = rx_scatter_enabled ? rx_scatter_max : 1;
+ rx_scatter_bufs = EFX_DIV_ROUND_UP(pdu + rx_prefix_size, rx_buf_size);
+
+ if (rx_scatter_bufs > effective_rx_scatter_max) {
+ if (rx_scatter_enabled)
+ *error = "Possible number of Rx scatter buffers exceeds maximum number";
+ else
+ *error = "Rx scatter is disabled and RxQ mbuf pool object size is too small";
return B_FALSE;
}
rte_free(rxq);
}
+
+/* Use qstop and qstart functions in the case of qstart failure */
+static sfc_dp_rx_qstop_t sfc_efx_rx_qstop;
+static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge;
+
+
static sfc_dp_rx_qstart_t sfc_efx_rx_qstart;
static int
sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq,
- __rte_unused unsigned int evq_read_ptr)
+ __rte_unused unsigned int evq_read_ptr,
+ const efx_rx_prefix_layout_t *pinfo)
{
/* libefx-based datapath is specific to libefx-based PMD */
struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq);
+ int rc;
+
+ /*
+ * libefx API is used to extract information from Rx prefix and
+ * it guarantees consistency. Just do length check to ensure
+ * that we reserved space in Rx buffers correctly.
+ */
+ if (rxq->prefix_size != pinfo->erpl_length)
+ return ENOTSUP;
rxq->common = crxq->common;
rxq->flags |= (SFC_EFX_RXQ_FLAG_STARTED | SFC_EFX_RXQ_FLAG_RUNNING);
+ if (rxq->flags & SFC_EFX_RXQ_FLAG_INTR_EN) {
+ rc = sfc_efx_rx_qprime(rxq);
+ if (rc != 0)
+ goto fail_rx_qprime;
+ }
+
return 0;
+
+fail_rx_qprime:
+ sfc_efx_rx_qstop(dp_rxq, NULL);
+ sfc_efx_rx_qpurge(dp_rxq);
+ return rc;
}
-static sfc_dp_rx_qstop_t sfc_efx_rx_qstop;
static void
sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq,
__rte_unused unsigned int *evq_read_ptr)
*/
}
-static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge;
static void
sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq)
{
rxq->flags &= ~SFC_EFX_RXQ_FLAG_STARTED;
}
+static sfc_dp_rx_intr_enable_t sfc_efx_rx_intr_enable;
+static int
+sfc_efx_rx_intr_enable(struct sfc_dp_rxq *dp_rxq)
+{
+ struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
+ int rc = 0;
+
+ rxq->flags |= SFC_EFX_RXQ_FLAG_INTR_EN;
+ if (rxq->flags & SFC_EFX_RXQ_FLAG_STARTED) {
+ rc = sfc_efx_rx_qprime(rxq);
+ if (rc != 0)
+ rxq->flags &= ~SFC_EFX_RXQ_FLAG_INTR_EN;
+ }
+ return rc;
+}
+
+static sfc_dp_rx_intr_disable_t sfc_efx_rx_intr_disable;
+static int
+sfc_efx_rx_intr_disable(struct sfc_dp_rxq *dp_rxq)
+{
+ struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
+
+ /* Cannot disarm, just disable rearm */
+ rxq->flags &= ~SFC_EFX_RXQ_FLAG_INTR_EN;
+ return 0;
+}
+
struct sfc_dp_rx sfc_efx_rx = {
.dp = {
.name = SFC_KVARG_DATAPATH_EFX,
.type = SFC_DP_RX,
- .hw_fw_caps = 0,
+ .hw_fw_caps = SFC_DP_HW_FW_CAP_RX_EFX,
},
- .features = 0,
- .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM,
+ .features = SFC_DP_RX_FEAT_INTR,
+ .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM |
+ DEV_RX_OFFLOAD_RSS_HASH,
.queue_offload_capa = DEV_RX_OFFLOAD_SCATTER,
.qsize_up_rings = sfc_efx_rx_qsize_up_rings,
.qcreate = sfc_efx_rx_qcreate,
.supported_ptypes_get = sfc_efx_supported_ptypes_get,
.qdesc_npending = sfc_efx_rx_qdesc_npending,
.qdesc_status = sfc_efx_rx_qdesc_status,
+ .intr_enable = sfc_efx_rx_intr_enable,
+ .intr_disable = sfc_efx_rx_intr_disable,
.pkt_burst = sfc_efx_recv_pkts,
};
sfc_warn(sa, "promiscuous mode will be disabled");
port->promisc = B_FALSE;
- rc = sfc_set_rx_mode(sa);
+ sa->eth_dev->data->promiscuous = 0;
+ rc = sfc_set_rx_mode_unchecked(sa);
if (rc != 0)
return rc;
sfc_warn(sa, "all-multicast mode will be disabled");
port->allmulti = B_FALSE;
- rc = sfc_set_rx_mode(sa);
+ sa->eth_dev->data->all_multicast = 0;
+ rc = sfc_set_rx_mode_unchecked(sa);
if (rc != 0)
return rc;
struct sfc_rxq_info *rxq_info;
struct sfc_rxq *rxq;
struct sfc_evq *evq;
+ efx_rx_prefix_layout_t pinfo;
int rc;
sfc_log_init(sa, "sw_index=%u", sw_index);
if (rc != 0)
goto fail_rx_qcreate;
+ rc = efx_rx_prefix_get_layout(rxq->common, &pinfo);
+ if (rc != 0)
+ goto fail_prefix_get_layout;
+
efx_rx_qenable(rxq->common);
- rc = sa->priv.dp_rx->qstart(rxq_info->dp, evq->read_ptr);
+ rc = sa->priv.dp_rx->qstart(rxq_info->dp, evq->read_ptr, &pinfo);
if (rc != 0)
goto fail_dp_qstart;
return 0;
fail_mac_filter_default_rxq_set:
+ sfc_rx_qflush(sa, sw_index);
sa->priv.dp_rx->qstop(rxq_info->dp, &rxq->evq->read_ptr);
+ rxq_info->state = SFC_RXQ_INITIALIZED;
fail_dp_qstart:
- sfc_rx_qflush(sa, sw_index);
+ efx_rx_qdestroy(rxq->common);
+fail_prefix_get_layout:
fail_rx_qcreate:
fail_bad_contig_block_size:
fail_mp_get_info:
* Start is aligned the same or better than end,
* just align length.
*/
- buf_size = P2ALIGN(buf_size, nic_align_end);
+ buf_size = EFX_P2ALIGN(uint32_t, buf_size, nic_align_end);
}
return buf_size;
if (!sfc_rx_check_scatter(sa->port.pdu, buf_size,
encp->enc_rx_prefix_size,
(offloads & DEV_RX_OFFLOAD_SCATTER),
+ encp->enc_rx_scatter_max,
&error)) {
sfc_err(sa, "RxQ %u MTU check failed: %s", sw_index, error);
sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) != 0)
rxq_info->type_flags |= EFX_RXQ_FLAG_INNER_CLASSES;
+ if (offloads & DEV_RX_OFFLOAD_RSS_HASH)
+ rxq_info->type_flags |= EFX_RXQ_FLAG_RSS_HASH;
+
rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_RX, sw_index,
evq_entries, socket_id, &evq);
if (rc != 0)
rxq_info->refill_threshold =
RTE_MAX(rx_free_thresh, SFC_RX_REFILL_BULK);
rxq_info->refill_mb_pool = mb_pool;
+
+ if (rss->hash_support == EFX_RX_HASH_AVAILABLE && rss->channels > 0 &&
+ (offloads & DEV_RX_OFFLOAD_RSS_HASH))
+ rxq_info->rxq_flags = SFC_RXQ_FLAG_RSS_HASH;
+ else
+ rxq_info->rxq_flags = 0;
+
rxq->buf_size = buf_size;
rc = sfc_dma_alloc(sa, "rxq", sw_index,
info.buf_size = buf_size;
info.batch_max = encp->enc_rx_batch_max;
info.prefix_size = encp->enc_rx_prefix_size;
-
- if (rss->hash_support == EFX_RX_HASH_AVAILABLE && rss->channels > 0)
- info.flags |= SFC_RXQ_FLAG_RSS_HASH;
-
+ info.flags = rxq_info->rxq_flags;
info.rxq_entries = rxq_info->entries;
info.rxq_hw_ring = rxq->mem.esm_base;
+ info.evq_hw_index = sfc_evq_index_by_rxq_sw_index(sa, sw_index);
info.evq_entries = evq_entries;
info.evq_hw_ring = evq->mem.esm_base;
info.hw_index = rxq->hw_index;
info.mem_bar = sa->mem_bar.esb_base;
info.vi_window_shift = encp->enc_vi_window_shift;
+ info.fcw_offset = sa->fcw_offset;
rc = sa->priv.dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index,
&RTE_ETH_DEV_TO_PCI(sa->eth_dev)->addr,
if (conf->rss_key != NULL) {
if (conf->rss_key_len != sizeof(rss->key)) {
- sfc_err(sa, "RSS key size is wrong (should be %lu)",
+ sfc_err(sa, "RSS key size is wrong (should be %zu)",
sizeof(rss->key));
return EINVAL;
}
git.droids-corp.org / dpdk.git / blobdiff