/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
* Copyright(c) 2016-2019 Solarflare Communications Inc.
*
* This software was jointly developed between OKTET Labs (under contract
++i, id = (id + 1) & rxq->ptr_mask) {
m = objs[i];
- MBUF_RAW_ALLOC_CHECK(m);
+ __rte_mbuf_raw_sanity_check(m);
rxd = &rxq->sw_desc[id];
rxd->mbuf = m;
static sfc_dp_rx_qstart_t sfc_efx_rx_qstart;
static int
sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq,
- __rte_unused unsigned int evq_read_ptr)
+ __rte_unused unsigned int evq_read_ptr,
+ const efx_rx_prefix_layout_t *pinfo)
{
/* libefx-based datapath is specific to libefx-based PMD */
struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq);
int rc;
+ /*
+ * libefx API is used to extract information from Rx prefix and
+ * it guarantees consistency. Just do length check to ensure
+ * that we reserved space in Rx buffers correctly.
+ */
+ if (rxq->prefix_size != pinfo->erpl_length)
+ return ENOTSUP;
+
rxq->common = crxq->common;
rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
.dp = {
.name = SFC_KVARG_DATAPATH_EFX,
.type = SFC_DP_RX,
- .hw_fw_caps = 0,
+ .hw_fw_caps = SFC_DP_HW_FW_CAP_RX_EFX,
},
.features = SFC_DP_RX_FEAT_INTR,
.dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM |
struct sfc_rxq_info *rxq_info;
struct sfc_rxq *rxq;
struct sfc_evq *evq;
+ efx_rx_prefix_layout_t pinfo;
int rc;
sfc_log_init(sa, "sw_index=%u", sw_index);
if (rc != 0)
goto fail_rx_qcreate;
+ rc = efx_rx_prefix_get_layout(rxq->common, &pinfo);
+ if (rc != 0)
+ goto fail_prefix_get_layout;
+
efx_rx_qenable(rxq->common);
- rc = sa->priv.dp_rx->qstart(rxq_info->dp, evq->read_ptr);
+ rc = sa->priv.dp_rx->qstart(rxq_info->dp, evq->read_ptr, &pinfo);
if (rc != 0)
goto fail_dp_qstart;
fail_dp_qstart:
efx_rx_qdestroy(rxq->common);
+fail_prefix_get_layout:
fail_rx_qcreate:
fail_bad_contig_block_size:
fail_mp_get_info:
DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) != 0)
rxq_info->type_flags |= EFX_RXQ_FLAG_INNER_CLASSES;
+ if (offloads & DEV_RX_OFFLOAD_RSS_HASH)
+ rxq_info->type_flags |= EFX_RXQ_FLAG_RSS_HASH;
+
rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_RX, sw_index,
evq_entries, socket_id, &evq);
if (rc != 0)
info.hw_index = rxq->hw_index;
info.mem_bar = sa->mem_bar.esb_base;
info.vi_window_shift = encp->enc_vi_window_shift;
+ info.fcw_offset = sa->fcw_offset;
rc = sa->priv.dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index,
&RTE_ETH_DEV_TO_PCI(sa->eth_dev)->addr,