efx_pcie_interface_t *controllers;
/** Number of DPDK controllers and EFX interfaces */
size_t nb_controllers;
+ /** MAE admin port */
+ struct sfc_mae_switch_port *mae_admin_port;
};
TAILQ_HEAD(sfc_mae_switch_domains, sfc_mae_switch_domain);
port->ethdev_mport = *req->ethdev_mportp;
port->ethdev_port_id = req->ethdev_port_id;
+ memcpy(&port->data, &req->port_data,
+ sizeof(port->data));
+
switch (req->type) {
case SFC_MAE_SWITCH_PORT_INDEPENDENT:
- /* No data */
+ if (port->data.indep.mae_admin) {
+ SFC_ASSERT(domain->mae_admin_port == NULL);
+ domain->mae_admin_port = port;
+ }
break;
case SFC_MAE_SWITCH_PORT_REPRESENTOR:
- memcpy(&port->data.repr, &req->port_data,
- sizeof(port->data.repr));
break;
default:
SFC_ASSERT(B_FALSE);
return rc;
}
+int
+sfc_mae_clear_switch_port(uint16_t switch_domain_id,
+ uint16_t switch_port_id)
+{
+ struct sfc_mae_switch_domain *domain;
+
+ rte_spinlock_lock(&sfc_mae_switch.lock);
+
+ domain = sfc_mae_find_switch_domain_by_id(switch_domain_id);
+ if (domain == NULL) {
+ rte_spinlock_unlock(&sfc_mae_switch.lock);
+ return EINVAL;
+ }
+
+ if (domain->mae_admin_port != NULL &&
+ domain->mae_admin_port->id == switch_port_id) {
+ domain->mae_admin_port->data.indep.mae_admin = B_FALSE;
+ domain->mae_admin_port = NULL;
+ }
+
+ rte_spinlock_unlock(&sfc_mae_switch.lock);
+ return 0;
+}
+
/* This function expects to be called only when the lock is held */
static int
sfc_mae_find_switch_port_by_ethdev(uint16_t switch_domain_id,
uint16_t ethdev_port_id,
- efx_mport_sel_t *mport_sel)
+ struct sfc_mae_switch_port **switch_port)
{
struct sfc_mae_switch_domain *domain;
struct sfc_mae_switch_port *port;
TAILQ_FOREACH(port, &domain->ports, switch_domain_ports) {
if (port->ethdev_port_id == ethdev_port_id) {
- *mport_sel = port->ethdev_mport;
+ *switch_port = port;
return 0;
}
}
}
int
-sfc_mae_switch_port_by_ethdev(uint16_t switch_domain_id,
- uint16_t ethdev_port_id,
- efx_mport_sel_t *mport_sel)
+sfc_mae_switch_get_ethdev_mport(uint16_t switch_domain_id,
+ uint16_t ethdev_port_id,
+ efx_mport_sel_t *mport_sel)
{
+ struct sfc_mae_switch_port *port;
int rc;
rte_spinlock_lock(&sfc_mae_switch.lock);
rc = sfc_mae_find_switch_port_by_ethdev(switch_domain_id,
- ethdev_port_id, mport_sel);
+ ethdev_port_id, &port);
+ if (rc != 0)
+ goto unlock;
+
+ if (port->type != SFC_MAE_SWITCH_PORT_INDEPENDENT) {
+ /*
+ * The ethdev is a "VF representor". It does not own
+ * a dedicated m-port suitable for use in flow rules.
+ */
+ rc = ENOTSUP;
+ goto unlock;
+ }
+
+ *mport_sel = port->ethdev_mport;
+
+unlock:
+ rte_spinlock_unlock(&sfc_mae_switch.lock);
+
+ return rc;
+}
+
+int
+sfc_mae_switch_get_entity_mport(uint16_t switch_domain_id,
+ uint16_t ethdev_port_id,
+ efx_mport_sel_t *mport_sel)
+{
+ static struct sfc_mae_switch_port *port;
+ int rc;
+
+ rte_spinlock_lock(&sfc_mae_switch.lock);
+ rc = sfc_mae_find_switch_port_by_ethdev(switch_domain_id,
+ ethdev_port_id, &port);
+ if (rc != 0)
+ goto unlock;
+
+ if (port->type == SFC_MAE_SWITCH_PORT_INDEPENDENT &&
+ !port->data.indep.mae_admin) {
+ /* See sfc_mae_assign_entity_mport() */
+ rc = ENOTSUP;
+ goto unlock;
+ }
+
+ *mport_sel = port->entity_mport;
+
+unlock:
rte_spinlock_unlock(&sfc_mae_switch.lock);
return rc;
return rc;
}
+
+static int
+sfc_mae_get_switch_domain_admin_locked(uint16_t switch_domain_id,
+ uint16_t *port_id)
+{
+ struct sfc_mae_switch_domain *domain;
+
+ SFC_ASSERT(rte_spinlock_is_locked(&sfc_mae_switch.lock));
+
+ domain = sfc_mae_find_switch_domain_by_id(switch_domain_id);
+ if (domain == NULL)
+ return EINVAL;
+
+ if (domain->mae_admin_port != NULL) {
+ *port_id = domain->mae_admin_port->ethdev_port_id;
+ return 0;
+ }
+
+ return ENOENT;
+}
+
+int
+sfc_mae_get_switch_domain_admin(uint16_t switch_domain_id,
+ uint16_t *port_id)
+{
+ int rc;
+
+ rte_spinlock_lock(&sfc_mae_switch.lock);
+ rc = sfc_mae_get_switch_domain_admin_locked(switch_domain_id, port_id);
+ rte_spinlock_unlock(&sfc_mae_switch.lock);
+ return rc;
+}