*/
#define RTE_SZE2_PACKET_HEADER_SIZE_ALIGNED 8
-#define RTE_SZEDATA2_DRIVER_NAME "rte_szedata2_pmd"
+#define RTE_SZEDATA2_DRIVER_NAME net_szedata2
#define RTE_SZEDATA2_PCI_DRIVER_NAME "rte_szedata2_pmd"
#define SZEDATA2_DEV_PATH_FMT "/dev/szedataII%u"
uint16_t max_rx_queues;
uint16_t max_tx_queues;
char sze_dev[PATH_MAX];
+ struct rte_mem_resource *pci_rsc;
};
static struct ether_addr eth_addr = {
struct rte_eth_dev_info *dev_info)
{
struct pmd_internals *internals = dev->data->dev_private;
+ dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
dev_info->if_index = 0;
dev_info->max_mac_addrs = 1;
dev_info->max_rx_pktlen = (uint32_t)-1;
dev_info->max_rx_queues = internals->max_rx_queues;
dev_info->max_tx_queues = internals->max_tx_queues;
dev_info->min_rx_bufsize = 0;
+ dev_info->speed_capa = ETH_LINK_SPEED_100G;
}
static void
struct rte_eth_link link;
struct rte_eth_link *link_ptr = &link;
struct rte_eth_link *dev_link = &dev->data->dev_link;
+ struct pmd_internals *internals = (struct pmd_internals *)
+ dev->data->dev_private;
volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
- dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
volatile struct szedata2_cgmii_ibuf *);
switch (cgmii_link_speed(ibuf)) {
case SZEDATA2_LINK_SPEED_10G:
- link.link_speed = ETH_LINK_SPEED_10G;
+ link.link_speed = ETH_SPEED_NUM_10G;
break;
case SZEDATA2_LINK_SPEED_40G:
- link.link_speed = ETH_LINK_SPEED_40G;
+ link.link_speed = ETH_SPEED_NUM_40G;
break;
case SZEDATA2_LINK_SPEED_100G:
- /*
- * TODO
- * If link_speed value from rte_eth_link structure
- * will be changed to support 100Gbps speed change
- * this value to 100G.
- */
- link.link_speed = ETH_LINK_SPEED_10G;
+ link.link_speed = ETH_SPEED_NUM_100G;
break;
default:
- link.link_speed = ETH_LINK_SPEED_10G;
+ link.link_speed = ETH_SPEED_NUM_10G;
break;
}
link.link_duplex = ETH_LINK_FULL_DUPLEX;
link.link_status = (cgmii_ibuf_is_enabled(ibuf) &&
- cgmii_ibuf_is_link_up(ibuf)) ? 1 : 0;
+ cgmii_ibuf_is_link_up(ibuf)) ? ETH_LINK_UP : ETH_LINK_DOWN;
+
+ link.link_autoneg = ETH_LINK_SPEED_FIXED;
rte_atomic64_cmpset((uint64_t *)dev_link, *(uint64_t *)dev_link,
*(uint64_t *)link_ptr);
static int
eth_dev_set_link_up(struct rte_eth_dev *dev)
{
+ struct pmd_internals *internals = (struct pmd_internals *)
+ dev->data->dev_private;
volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
- dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
volatile struct szedata2_cgmii_ibuf *);
volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
- dev, SZEDATA2_CGMII_OBUF_BASE_OFF,
+ internals->pci_rsc, SZEDATA2_CGMII_OBUF_BASE_OFF,
volatile struct szedata2_cgmii_obuf *);
cgmii_ibuf_enable(ibuf);
static int
eth_dev_set_link_down(struct rte_eth_dev *dev)
{
+ struct pmd_internals *internals = (struct pmd_internals *)
+ dev->data->dev_private;
volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
- dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
volatile struct szedata2_cgmii_ibuf *);
volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
- dev, SZEDATA2_CGMII_OBUF_BASE_OFF,
+ internals->pci_rsc, SZEDATA2_CGMII_OBUF_BASE_OFF,
volatile struct szedata2_cgmii_obuf *);
cgmii_ibuf_disable(ibuf);
static void
eth_promiscuous_enable(struct rte_eth_dev *dev)
{
+ struct pmd_internals *internals = (struct pmd_internals *)
+ dev->data->dev_private;
volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
- dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
volatile struct szedata2_cgmii_ibuf *);
cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_PROMISC);
}
static void
eth_promiscuous_disable(struct rte_eth_dev *dev)
{
+ struct pmd_internals *internals = (struct pmd_internals *)
+ dev->data->dev_private;
volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
- dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
volatile struct szedata2_cgmii_ibuf *);
cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
}
static void
eth_allmulticast_enable(struct rte_eth_dev *dev)
{
+ struct pmd_internals *internals = (struct pmd_internals *)
+ dev->data->dev_private;
volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
- dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
volatile struct szedata2_cgmii_ibuf *);
cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
}
static void
eth_allmulticast_disable(struct rte_eth_dev *dev)
{
+ struct pmd_internals *internals = (struct pmd_internals *)
+ dev->data->dev_private;
volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
- dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF,
volatile struct szedata2_cgmii_ibuf *);
cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
}
* -1 on error
*/
static int
-get_szedata2_index(struct rte_eth_dev *dev, uint32_t *index)
+get_szedata2_index(const struct rte_pci_addr *pcislot_addr, uint32_t *index)
{
DIR *dir;
struct dirent *entry;
uint32_t tmp_index;
FILE *fd;
char pcislot_path[PATH_MAX];
- struct rte_pci_addr pcislot_addr = dev->pci_dev->addr;
uint32_t domain;
uint32_t bus;
uint32_t devid;
if (ret != 4)
continue;
- if (pcislot_addr.domain == domain &&
- pcislot_addr.bus == bus &&
- pcislot_addr.devid == devid &&
- pcislot_addr.function == function) {
+ if (pcislot_addr->domain == domain &&
+ pcislot_addr->bus == bus &&
+ pcislot_addr->devid == devid &&
+ pcislot_addr->function == function) {
*index = tmp_index;
closedir(dir);
return 0;
struct szedata *szedata_temp;
int ret;
uint32_t szedata2_index;
- struct rte_pci_addr *pci_addr = &dev->pci_dev->addr;
- struct rte_pci_resource *pci_rsc =
- &dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER];
+ struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
+ struct rte_pci_addr *pci_addr = &pci_dev->addr;
+ struct rte_mem_resource *pci_rsc =
+ &pci_dev->mem_resource[PCI_RESOURCE_NUMBER];
char rsc_filename[PATH_MAX];
void *pci_resource_ptr = NULL;
int fd;
pci_addr->function);
/* Get index of szedata2 device file and create path to device file */
- ret = get_szedata2_index(dev, &szedata2_index);
+ ret = get_szedata2_index(pci_addr, &szedata2_index);
if (ret != 0) {
RTE_LOG(ERR, PMD, "Failed to get szedata2 device index!\n");
return -ENODEV;
/* Set function callbacks for Ethernet API */
dev->dev_ops = &ops;
- rte_eth_copy_pci_info(dev, dev->pci_dev);
+ rte_eth_copy_pci_info(dev, pci_dev);
- /* mmap pci resource0 file to rte_pci_resource structure */
- if (dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].phys_addr ==
+ /* mmap pci resource0 file to rte_mem_resource structure */
+ if (pci_dev->mem_resource[PCI_RESOURCE_NUMBER].phys_addr ==
0) {
RTE_LOG(ERR, PMD, "Missing resource%u file\n",
PCI_RESOURCE_NUMBER);
return -EINVAL;
}
snprintf(rsc_filename, PATH_MAX,
- SYSFS_PCI_DEVICES "/" PCI_PRI_FMT "/resource%u",
+ "%s/" PCI_PRI_FMT "/resource%u", pci_get_sysfs_path(),
pci_addr->domain, pci_addr->bus,
pci_addr->devid, pci_addr->function, PCI_RESOURCE_NUMBER);
fd = open(rsc_filename, O_RDWR);
}
pci_resource_ptr = mmap(0,
- dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len,
+ pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len,
PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
close(fd);
if (pci_resource_ptr == NULL) {
rsc_filename, fd);
return -EINVAL;
}
- dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr =
- pci_resource_ptr;
+ pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr = pci_resource_ptr;
+ internals->pci_rsc = pci_rsc;
RTE_LOG(DEBUG, PMD, "resource%u phys_addr = 0x%llx len = %llu "
"virt addr = %llx\n", PCI_RESOURCE_NUMBER,
RTE_CACHE_LINE_SIZE);
if (data->mac_addrs == NULL) {
RTE_LOG(ERR, PMD, "Could not alloc space for MAC address!\n");
- munmap(dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr,
- dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len);
+ munmap(pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr,
+ pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len);
return -EINVAL;
}
static int
rte_szedata2_eth_dev_uninit(struct rte_eth_dev *dev)
{
- struct rte_pci_addr *pci_addr = &dev->pci_dev->addr;
+ struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
+ struct rte_pci_addr *pci_addr = &pci_dev->addr;
rte_free(dev->data->mac_addrs);
dev->data->mac_addrs = NULL;
- munmap(dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr,
- dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len);
+ munmap(pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr,
+ pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len);
RTE_LOG(INFO, PMD, "szedata2 device ("
PCI_PRI_FMT ") successfully uninitialized\n",
static struct eth_driver szedata2_eth_driver = {
.pci_drv = {
- .name = RTE_SZEDATA2_PCI_DRIVER_NAME,
.id_table = rte_szedata2_pci_id_table,
+ .probe = rte_eth_dev_pci_probe,
+ .remove = rte_eth_dev_pci_remove,
},
.eth_dev_init = rte_szedata2_eth_dev_init,
.eth_dev_uninit = rte_szedata2_eth_dev_uninit,
.dev_private_size = sizeof(struct pmd_internals),
};
-static int
-rte_szedata2_init(const char *name __rte_unused,
- const char *args __rte_unused)
-{
- rte_eth_driver_register(&szedata2_eth_driver);
- return 0;
-}
-
-static int
-rte_szedata2_uninit(const char *name __rte_unused)
-{
- return 0;
-}
-
-static struct rte_driver rte_szedata2_driver = {
- .type = PMD_PDEV,
- .name = RTE_SZEDATA2_DRIVER_NAME,
- .init = rte_szedata2_init,
- .uninit = rte_szedata2_uninit,
-};
-
-PMD_REGISTER_DRIVER(rte_szedata2_driver);
+RTE_PMD_REGISTER_PCI(RTE_SZEDATA2_DRIVER_NAME, szedata2_eth_driver.pci_drv);
+RTE_PMD_REGISTER_PCI_TABLE(RTE_SZEDATA2_DRIVER_NAME, rte_szedata2_pci_id_table);
+RTE_PMD_REGISTER_KMOD_DEP(RTE_SZEDATA2_DRIVER_NAME,
+ "* combo6core & combov3 & szedata2 & szedata2_cv3");
git.droids-corp.org / dpdk.git / blobdiff