net/bnxt: support xstats get/reset

[dpdk.git] / drivers / net / szedata2 / rte_eth_szedata2.h

diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h
index 39d1c48..afe8a38 100644 (file)
--- a/drivers/net/szedata2/rte_eth_szedata2.h
+++ b/drivers/net/szedata2/rte_eth_szedata2.h
@@ -117,94 +117,82 @@ struct szedata {
  * @return Byte from PCI resource at offset "offset".
  */
 static inline uint8_t
-pci_resource_read8(struct rte_eth_dev *dev, uint32_t offset)
+pci_resource_read8(struct rte_mem_resource *rsc, uint32_t offset)
 {
-       return *((uint8_t *)((uint8_t *)
-                       dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr +
-                       offset));
+       return *((uint8_t *)((uint8_t *)rsc->addr + offset));
 }
 
 /*
  * @return Two bytes from PCI resource starting at offset "offset".
  */
 static inline uint16_t
-pci_resource_read16(struct rte_eth_dev *dev, uint32_t offset)
+pci_resource_read16(struct rte_mem_resource *rsc, uint32_t offset)
 {
-       return rte_le_to_cpu_16(*((uint16_t *)((uint8_t *)
-                       dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr +
-                       offset)));
+       return rte_le_to_cpu_16(*((uint16_t *)((uint8_t *)rsc->addr +
+                                              offset)));
 }
 
 /*
  * @return Four bytes from PCI resource starting at offset "offset".
  */
 static inline uint32_t
-pci_resource_read32(struct rte_eth_dev *dev, uint32_t offset)
+pci_resource_read32(struct rte_mem_resource *rsc, uint32_t offset)
 {
-       return rte_le_to_cpu_32(*((uint32_t *)((uint8_t *)
-                       dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr +
-                       offset)));
+       return rte_le_to_cpu_32(*((uint32_t *)((uint8_t *)rsc->addr +
+                                              offset)));
 }
 
 /*
  * @return Eight bytes from PCI resource starting at offset "offset".
  */
 static inline uint64_t
-pci_resource_read64(struct rte_eth_dev *dev, uint32_t offset)
+pci_resource_read64(struct rte_mem_resource *rsc, uint32_t offset)
 {
-       return rte_le_to_cpu_64(*((uint64_t *)((uint8_t *)
-                       dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr +
-                       offset)));
+       return rte_le_to_cpu_64(*((uint64_t *)((uint8_t *)rsc->addr +
+                                              offset)));
 }
 
 /*
  * Write one byte to PCI resource address space at offset "offset".
  */
 static inline void
-pci_resource_write8(struct rte_eth_dev *dev, uint32_t offset, uint8_t val)
+pci_resource_write8(struct rte_mem_resource *rsc, uint32_t offset, uint8_t val)
 {
-       *((uint8_t *)((uint8_t *)
-                       dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr +
-                       offset)) = val;
+       *((uint8_t *)((uint8_t *)rsc->addr + offset)) = val;
 }
 
 /*
  * Write two bytes to PCI resource address space at offset "offset".
  */
 static inline void
-pci_resource_write16(struct rte_eth_dev *dev, uint32_t offset, uint16_t val)
+pci_resource_write16(struct rte_mem_resource *rsc, uint32_t offset,
+                    uint16_t val)
 {
-       *((uint16_t *)((uint8_t *)
-                       dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr +
-                       offset)) = rte_cpu_to_le_16(val);
+       *((uint16_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_16(val);
 }
 
 /*
  * Write four bytes to PCI resource address space at offset "offset".
  */
 static inline void
-pci_resource_write32(struct rte_eth_dev *dev, uint32_t offset, uint32_t val)
+pci_resource_write32(struct rte_mem_resource *rsc, uint32_t offset,
+                    uint32_t val)
 {
-       *((uint32_t *)((uint8_t *)
-                       dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr +
-                       offset)) = rte_cpu_to_le_32(val);
+       *((uint32_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_32(val);
 }
 
 /*
  * Write eight bytes to PCI resource address space at offset "offset".
  */
 static inline void
-pci_resource_write64(struct rte_eth_dev *dev, uint32_t offset, uint64_t val)
+pci_resource_write64(struct rte_mem_resource *rsc, uint32_t offset,
+                    uint64_t val)
 {
-       *((uint64_t *)((uint8_t *)
-                       dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr +
-                       offset)) = rte_cpu_to_le_64(val);
+       *((uint64_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_64(val);
 }
 
-#define SZEDATA2_PCI_RESOURCE_PTR(dev, offset, type) \
-       ((type)((uint8_t *) \
-       ((dev)->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr) \
-       + (offset)))
+#define SZEDATA2_PCI_RESOURCE_PTR(rsc, offset, type) \
+       ((type)(((uint8_t *)(rsc)->addr) + (offset)))
 
 enum szedata2_link_speed {
        SZEDATA2_LINK_SPEED_DEFAULT = 0,
@@ -213,6 +201,13 @@ enum szedata2_link_speed {
        SZEDATA2_LINK_SPEED_100G,
 };
 
+enum szedata2_mac_check_mode {
+       SZEDATA2_MAC_CHMODE_PROMISC       = 0x0,
+       SZEDATA2_MAC_CHMODE_ONLY_VALID    = 0x1,
+       SZEDATA2_MAC_CHMODE_ALL_BROADCAST = 0x2,
+       SZEDATA2_MAC_CHMODE_ALL_MULTICAST = 0x3,
+};
+
 /*
  * Structure describes CGMII IBUF address space
  */
@@ -298,6 +293,38 @@ cgmii_ibuf_is_link_up(volatile struct szedata2_cgmii_ibuf *ibuf)
        return ((rte_le_to_cpu_32(ibuf->ibuf_st) & 0x80) != 0) ? true : false;
 }
 
+/*
+ * @return
+ *     MAC address check mode
+ */
+static inline enum szedata2_mac_check_mode
+cgmii_ibuf_mac_mode_read(volatile struct szedata2_cgmii_ibuf *ibuf)
+{
+       switch (rte_le_to_cpu_32(ibuf->mac_chmode) & 0x3) {
+       case 0x0:
+               return SZEDATA2_MAC_CHMODE_PROMISC;
+       case 0x1:
+               return SZEDATA2_MAC_CHMODE_ONLY_VALID;
+       case 0x2:
+               return SZEDATA2_MAC_CHMODE_ALL_BROADCAST;
+       case 0x3:
+               return SZEDATA2_MAC_CHMODE_ALL_MULTICAST;
+       default:
+               return SZEDATA2_MAC_CHMODE_PROMISC;
+       }
+}
+
+/*
+ * Writes "mode" in MAC address check mode register.
+ */
+static inline void
+cgmii_ibuf_mac_mode_write(volatile struct szedata2_cgmii_ibuf *ibuf,
+               enum szedata2_mac_check_mode mode)
+{
+       ibuf->mac_chmode = rte_cpu_to_le_32(
+                       (rte_le_to_cpu_32(ibuf->mac_chmode) & ~0x3) | mode);
+}
+
 /*
  * Structure describes CGMII OBUF address space
  */