drivers/net: rename physical address type to IOVA

[dpdk.git] / drivers / net / thunderx / base / nicvf_hw.h

diff --git a/drivers/net/thunderx/base/nicvf_hw.h b/drivers/net/thunderx/base/nicvf_hw.h
index dc9f4f1..698aa48 100644 (file)
--- a/drivers/net/thunderx/base/nicvf_hw.h
+++ b/drivers/net/thunderx/base/nicvf_hw.h
@@ -1,7 +1,7 @@
 /*
  *   BSD LICENSE
  *
- *   Copyright (C) Cavium networks Ltd. 2016.
+ *   Copyright (C) Cavium, Inc. 2016.
  *
  *   Redistribution and use in source and binary forms, with or without
  *   modification, are permitted provided that the following conditions
@@ -13,7 +13,7 @@
  *       notice, this list of conditions and the following disclaimer in
  *       the documentation and/or other materials provided with the
  *       distribution.
- *     * Neither the name of Cavium networks nor the names of its
+ *     * Neither the name of Cavium, Inc nor the names of its
  *       contributors may be used to endorse or promote products derived
  *       from this software without specific prior written permission.
  *
@@ -37,18 +37,26 @@
 
 #include "nicvf_hw_defs.h"
 
-#define        PCI_VENDOR_ID_CAVIUM                    0x177D
-#define        PCI_DEVICE_ID_THUNDERX_PASS1_NICVF      0x0011
-#define        PCI_DEVICE_ID_THUNDERX_PASS2_NICVF      0xA034
-#define        PCI_SUB_DEVICE_ID_THUNDERX_PASS1_NICVF  0xA11E
-#define        PCI_SUB_DEVICE_ID_THUNDERX_PASS2_NICVF  0xA134
+#define        PCI_VENDOR_ID_CAVIUM                            0x177D
+#define        PCI_DEVICE_ID_THUNDERX_CN88XX_PASS1_NICVF       0x0011
+#define        PCI_DEVICE_ID_THUNDERX_NICVF                    0xA034
+#define        PCI_SUB_DEVICE_ID_CN88XX_PASS1_NICVF            0xA11E
+#define        PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF            0xA134
+#define        PCI_SUB_DEVICE_ID_CN81XX_NICVF                  0xA234
+#define        PCI_SUB_DEVICE_ID_CN83XX_NICVF                  0xA334
 
 #define NICVF_ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
 
-#define NICVF_PASS1    (PCI_SUB_DEVICE_ID_THUNDERX_PASS1_NICVF)
-#define NICVF_PASS2    (PCI_SUB_DEVICE_ID_THUNDERX_PASS2_NICVF)
+#define NICVF_GET_RX_STATS(reg) \
+       nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
+#define NICVF_GET_TX_STATS(reg) \
+       nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
 
-#define NICVF_CAP_TUNNEL_PARSING          (1ULL << 0)
+#define NICVF_CAP_TUNNEL_PARSING       (1ULL << 0)
+/* Additional word in Rx descriptor to hold optional tunneling extension info */
+#define NICVF_CAP_CQE_RX2              (1ULL << 1)
+/* The device capable of setting NIC_CQE_RX_S[APAD] == 0 */
+#define NICVF_CAP_DISABLE_APAD         (1ULL << 2)
 
 enum nicvf_tns_mode {
        NIC_TNS_BYPASS_MODE,
@@ -76,9 +84,50 @@ enum nicvf_err_e {
        NICVF_ERR_SQ_PF_CFG,     /* -8175 */
        NICVF_ERR_LOOPBACK_CFG,  /* -8174 */
        NICVF_ERR_BASE_INIT,     /* -8173 */
+       NICVF_ERR_RSS_TBL_UPDATE,/* -8172 */
+       NICVF_ERR_RSS_GET_SZ,    /* -8171 */
 };
 
-typedef nicvf_phys_addr_t (*rbdr_pool_get_handler)(void *opaque);
+typedef nicvf_iova_addr_t (*rbdr_pool_get_handler)(void *dev, void *opaque);
+
+struct nicvf_hw_rx_qstats {
+       uint64_t q_rx_bytes;
+       uint64_t q_rx_packets;
+};
+
+struct nicvf_hw_tx_qstats {
+       uint64_t q_tx_bytes;
+       uint64_t q_tx_packets;
+};
+
+struct nicvf_hw_stats {
+       uint64_t rx_bytes;
+       uint64_t rx_ucast_frames;
+       uint64_t rx_bcast_frames;
+       uint64_t rx_mcast_frames;
+       uint64_t rx_fcs_errors;
+       uint64_t rx_l2_errors;
+       uint64_t rx_drop_red;
+       uint64_t rx_drop_red_bytes;
+       uint64_t rx_drop_overrun;
+       uint64_t rx_drop_overrun_bytes;
+       uint64_t rx_drop_bcast;
+       uint64_t rx_drop_mcast;
+       uint64_t rx_drop_l3_bcast;
+       uint64_t rx_drop_l3_mcast;
+
+       uint64_t tx_bytes_ok;
+       uint64_t tx_ucast_frames_ok;
+       uint64_t tx_bcast_frames_ok;
+       uint64_t tx_mcast_frames_ok;
+       uint64_t tx_drops;
+};
+
+struct nicvf_rss_reta_info {
+       uint8_t hash_bits;
+       uint16_t rss_size;
+       uint8_t ind_tbl[NIC_MAX_RSS_IDR_TBL_SIZE];
+};
 
 /* Common structs used in DPDK and base layer are defined in DPDK layer */
 #include "../nicvf_struct.h"
@@ -148,8 +197,8 @@ int nicvf_qset_reclaim(struct nicvf *nic);
 
 int nicvf_qset_rbdr_config(struct nicvf *nic, uint16_t qidx);
 int nicvf_qset_rbdr_reclaim(struct nicvf *nic, uint16_t qidx);
-int nicvf_qset_rbdr_precharge(struct nicvf *nic, uint16_t ridx,
-                             rbdr_pool_get_handler handler, void *opaque,
+int nicvf_qset_rbdr_precharge(void *dev, struct nicvf *nic,
+                             uint16_t ridx, rbdr_pool_get_handler handler,
                              uint32_t max_buffs);
 int nicvf_qset_rbdr_active(struct nicvf *nic, uint16_t qidx);
 
@@ -171,6 +220,26 @@ uint32_t nicvf_qsize_sq_roundup(uint32_t val);
 
 void nicvf_vlan_hw_strip(struct nicvf *nic, bool enable);
 
+void nicvf_apad_config(struct nicvf *nic, bool enable);
+
+int nicvf_rss_config(struct nicvf *nic, uint32_t  qcnt, uint64_t cfg);
+int nicvf_rss_term(struct nicvf *nic);
+
+int nicvf_rss_reta_update(struct nicvf *nic, uint8_t *tbl, uint32_t max_count);
+int nicvf_rss_reta_query(struct nicvf *nic, uint8_t *tbl, uint32_t max_count);
+
+void nicvf_rss_set_key(struct nicvf *nic, uint8_t *key);
+void nicvf_rss_get_key(struct nicvf *nic, uint8_t *key);
+
+void nicvf_rss_set_cfg(struct nicvf *nic, uint64_t val);
+uint64_t nicvf_rss_get_cfg(struct nicvf *nic);
+
 int nicvf_loopback_config(struct nicvf *nic, bool enable);
 
+void nicvf_hw_get_stats(struct nicvf *nic, struct nicvf_hw_stats *stats);
+void nicvf_hw_get_rx_qstats(struct nicvf *nic,
+                           struct nicvf_hw_rx_qstats *qstats, uint16_t qidx);
+void nicvf_hw_get_tx_qstats(struct nicvf *nic,
+                           struct nicvf_hw_tx_qstats *qstats, uint16_t qidx);
+
 #endif /* _THUNDERX_NICVF_HW_H */