net/mlx5: add C++ include guard to public header

[dpdk.git] / drivers / net / txgbe / txgbe_ethdev.c

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 169272d..ac4d4e0 100644 (file)
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -495,7 +495,7 @@ txgbe_parse_devargs(struct txgbe_hw *hw, struct rte_devargs *devargs)
        struct rte_kvargs *kvlist;
        u16 auto_neg = 1;
        u16 poll = 0;
-       u16 present = 1;
+       u16 present = 0;
        u16 sgmii = 0;
        u16 ffe_set = 0;
        u16 ffe_main = 27;
@@ -1678,7 +1678,7 @@ txgbe_dev_start(struct rte_eth_dev *dev)
                        return -ENOMEM;
                }
        }
-       /* confiugre msix for sleep until rx interrupt */
+       /* configure msix for sleep until rx interrupt */
        txgbe_configure_msix(dev);
 
        /* initialize transmission unit */
@@ -2597,6 +2597,7 @@ txgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
        dev_info->max_vfs = pci_dev->max_vfs;
        dev_info->max_vmdq_pools = RTE_ETH_64_POOLS;
        dev_info->vmdq_queue_num = dev_info->max_rx_queues;
+       dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP;
        dev_info->rx_queue_offload_capa = txgbe_get_rx_queue_offloads(dev);
        dev_info->rx_offload_capa = (txgbe_get_rx_port_offloads(dev) |
                                     dev_info->rx_queue_offload_capa);
@@ -2693,7 +2694,7 @@ txgbe_dev_link_update_share(struct rte_eth_dev *dev,
        link.link_speed = RTE_ETH_SPEED_NUM_NONE;
        link.link_duplex = RTE_ETH_LINK_HALF_DUPLEX;
        link.link_autoneg = !(dev->data->dev_conf.link_speeds &
-                       RTE_ETH_LINK_AUTONEG);
+                       RTE_ETH_LINK_SPEED_FIXED);
 
        hw->mac.get_link_status = true;
 
@@ -3460,7 +3461,7 @@ txgbe_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
         * scattered packets when this feature has not been enabled before.
         */
        if (dev_data->dev_started && !dev_data->scattered_rx &&
-           (frame_size + 2 * TXGBE_VLAN_TAG_SIZE >
+           (frame_size + 2 * RTE_VLAN_HLEN >
             dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {
                PMD_INIT_LOG(ERR, "Stop port first.");
                return -EINVAL;
@@ -3681,7 +3682,7 @@ txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
                wr32(hw, TXGBE_IVARMISC, tmp);
        } else {
                /* rx or tx causes */
-               /* Workround for ICR lost */
+               /* Workaround for ICR lost */
                idx = ((16 * (queue & 1)) + (8 * direction));
                tmp = rd32(hw, TXGBE_IVAR(queue >> 1));
                tmp &= ~(0xFF << idx);
@@ -4386,7 +4387,7 @@ txgbe_timesync_disable(struct rte_eth_dev *dev)
        /* Disable L2 filtering of IEEE1588/802.1AS Ethernet frame types. */
        wr32(hw, TXGBE_ETFLT(TXGBE_ETF_ID_1588), 0);
 
-       /* Stop incrementating the System Time registers. */
+       /* Stop incrementing the System Time registers. */
        wr32(hw, TXGBE_TSTIMEINC, 0);
 
        return 0;