#define PCI_CAPABILITY_LIST 0x34
#define PCI_CAP_ID_VNDR 0x09
+#define VIRTIO_PCI_REG_ADDR(hw, reg) \
+ (unsigned short)((hw)->io_base + (reg))
+
+#define VIRTIO_READ_REG_1(hw, reg) \
+ inb((VIRTIO_PCI_REG_ADDR((hw), (reg))))
+#define VIRTIO_WRITE_REG_1(hw, reg, value) \
+ outb_p((unsigned char)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg))))
+
+#define VIRTIO_READ_REG_2(hw, reg) \
+ inw((VIRTIO_PCI_REG_ADDR((hw), (reg))))
+#define VIRTIO_WRITE_REG_2(hw, reg, value) \
+ outw_p((unsigned short)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg))))
+
+#define VIRTIO_READ_REG_4(hw, reg) \
+ inl((VIRTIO_PCI_REG_ADDR((hw), (reg))))
+#define VIRTIO_WRITE_REG_4(hw, reg, value) \
+ outl_p((unsigned int)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg))))
+
static void
legacy_read_dev_config(struct virtio_hw *hw, size_t offset,
void *dst, int length)
if (d)
closedir(d);
- return (d != NULL);
+ return d != NULL;
}
/* Extract I/O port numbers from sysfs */
#else
static int
-legayc_virtio_has_msix(const struct rte_pci_addr *loc __rte_unused)
+legacy_virtio_has_msix(const struct rte_pci_addr *loc __rte_unused)
{
/* nic_uio does not enable interrupts, return 0 (false). */
return 0;
struct virtio_pci_cap cap;
int ret;
- if (rte_eal_pci_map_device(dev) < 0) {
+ if (rte_eal_pci_map_device(dev)) {
PMD_INIT_LOG(DEBUG, "failed to map pci device!");
return -1;
}