net/hns3: fix return value for unsupported tuple
[dpdk.git] / drivers / net / vmxnet3 / vmxnet3_ethdev.h
index 8950175..5a30371 100644 (file)
                                VMXNET3_MAX_RX_QUEUES + 1)
 
 #define VMXNET3_RSS_OFFLOAD_ALL ( \
-       ETH_RSS_IPV4 | \
-       ETH_RSS_NONFRAG_IPV4_TCP | \
-       ETH_RSS_IPV6 | \
-       ETH_RSS_NONFRAG_IPV6_TCP)
+       RTE_ETH_RSS_IPV4 | \
+       RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
+       RTE_ETH_RSS_IPV6 | \
+       RTE_ETH_RSS_NONFRAG_IPV6_TCP)
 
 #define VMXNET3_V4_RSS_MASK ( \
-       ETH_RSS_NONFRAG_IPV4_UDP | \
-       ETH_RSS_NONFRAG_IPV6_UDP)
+       RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
+       RTE_ETH_RSS_NONFRAG_IPV6_UDP)
 
 #define VMXNET3_MANDATORY_V4_RSS ( \
-       ETH_RSS_NONFRAG_IPV4_TCP | \
-       ETH_RSS_NONFRAG_IPV6_TCP)
+       RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
+       RTE_ETH_RSS_NONFRAG_IPV6_TCP)
 
 /* RSS configuration structure - shared with device through GPA */
 typedef struct VMXNET3_RSSConf {
@@ -70,7 +70,7 @@ struct vmxnet3_intr {
        enum vmxnet3_intr_type      type; /* MSI-X, MSI, or INTx? */
        uint8_t num_intrs;                /* # of intr vectors */
        uint8_t event_intr_idx;           /* idx of the intr vector for event */
-       uint8_t mod_levels[VMXNET3_MAX_MSIX_VECT]; /* moderation level */
+       uint8_t mod_levels[VMXNET3_EXT_MAX_INTRS]; /* moderation level */
        bool lsc_only;                    /* no Rx queue interrupt */
 };
 
@@ -108,6 +108,7 @@ struct vmxnet3_hw {
        uint64_t              queueDescPA;
        uint16_t              queue_desc_len;
        uint16_t              mtu;
+       bool                  queuesExtEnabled;
 
        VMXNET3_RSSConf       *rss_conf;
        uint64_t              rss_confPA;
@@ -117,18 +118,21 @@ struct vmxnet3_hw {
        Vmxnet3_MemRegs       *memRegs;
        uint64_t              memRegsPA;
 #define VMXNET3_VFT_TABLE_SIZE     (VMXNET3_VFT_SIZE * sizeof(uint32_t))
-       UPT1_TxStats          saved_tx_stats[VMXNET3_MAX_TX_QUEUES];
-       UPT1_RxStats          saved_rx_stats[VMXNET3_MAX_RX_QUEUES];
-
+       UPT1_TxStats          saved_tx_stats[VMXNET3_EXT_MAX_TX_QUEUES];
+       UPT1_RxStats          saved_rx_stats[VMXNET3_EXT_MAX_RX_QUEUES];
        UPT1_TxStats          snapshot_tx_stats[VMXNET3_MAX_TX_QUEUES];
        UPT1_RxStats          snapshot_rx_stats[VMXNET3_MAX_RX_QUEUES];
 };
 
+#define VMXNET3_REV_6          5               /* Vmxnet3 Rev. 6 */
+#define VMXNET3_REV_5          4               /* Vmxnet3 Rev. 5 */
 #define VMXNET3_REV_4          3               /* Vmxnet3 Rev. 4 */
 #define VMXNET3_REV_3          2               /* Vmxnet3 Rev. 3 */
 #define VMXNET3_REV_2          1               /* Vmxnet3 Rev. 2 */
 #define VMXNET3_REV_1          0               /* Vmxnet3 Rev. 1 */
 
+#define VMXNET3_VERSION_GE_6(hw) ((hw)->version >= VMXNET3_REV_6 + 1)
+#define VMXNET3_VERSION_GE_5(hw) ((hw)->version >= VMXNET3_REV_5 + 1)
 #define VMXNET3_VERSION_GE_4(hw) ((hw)->version >= VMXNET3_REV_4 + 1)
 #define VMXNET3_VERSION_GE_3(hw) ((hw)->version >= VMXNET3_REV_3 + 1)
 #define VMXNET3_VERSION_GE_2(hw) ((hw)->version >= VMXNET3_REV_2 + 1)
@@ -191,6 +195,9 @@ int  vmxnet3_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
                                uint16_t nb_rx_desc, unsigned int socket_id,
                                const struct rte_eth_rxconf *rx_conf,
                                struct rte_mempool *mb_pool);
+
+uint32_t vmxnet3_dev_rx_queue_count(void *rx_queue);
+
 int  vmxnet3_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
                                uint16_t nb_tx_desc, unsigned int socket_id,
                                const struct rte_eth_txconf *tx_conf);