= TAILQ_HEAD_INITIALIZER(qdma_queue_list);
/* QDMA Virtual Queues */
-struct qdma_virt_queue *qdma_vqs;
+static struct qdma_virt_queue *qdma_vqs;
/* QDMA per core data */
-struct qdma_per_core_info qdma_core_info[RTE_MAX_LCORE];
+static struct qdma_per_core_info qdma_core_info[RTE_MAX_LCORE];
static struct qdma_hw_queue *
alloc_hw_queue(uint32_t lcore_id)
}
}
-int __rte_experimental
+int
rte_qdma_init(void)
{
DPAA2_QDMA_FUNC_TRACE();
return 0;
}
-void __rte_experimental
+void
rte_qdma_attr_get(struct rte_qdma_attr *qdma_attr)
{
DPAA2_QDMA_FUNC_TRACE();
qdma_attr->num_hw_queues = qdma_dev.num_hw_queues;
}
-int __rte_experimental
+int
rte_qdma_reset(void)
{
struct qdma_hw_queue *queue;
return 0;
}
-int __rte_experimental
+int
rte_qdma_configure(struct rte_qdma_config *qdma_config)
{
int ret;
return 0;
}
-int __rte_experimental
+int
rte_qdma_start(void)
{
DPAA2_QDMA_FUNC_TRACE();
return 0;
}
-int __rte_experimental
+int
rte_qdma_vq_create(uint32_t lcore_id, uint32_t flags)
{
char ring_name[32];
qdma_vqs[i].exclusive_hw_queue = 1;
} else {
/* Allocate a Ring for Virutal Queue in VQ mode */
- sprintf(ring_name, "status ring %d", i);
+ snprintf(ring_name, sizeof(ring_name), "status ring %d", i);
qdma_vqs[i].status_ring = rte_ring_create(ring_name,
qdma_dev.fle_pool_count, rte_socket_id(), 0);
if (!qdma_vqs[i].status_ring) {
return job;
}
-void __rte_experimental
+void
rte_qdma_vq_stats(uint16_t vq_id,
struct rte_qdma_vq_stats *vq_status)
{
}
}
-int __rte_experimental
+int
rte_qdma_vq_destroy(uint16_t vq_id)
{
struct qdma_virt_queue *qdma_vq = &qdma_vqs[vq_id];
return 0;
}
-void __rte_experimental
+void
rte_qdma_stop(void)
{
DPAA2_QDMA_FUNC_TRACE();
qdma_dev.state = 0;
}
-void __rte_experimental
+void
rte_qdma_destroy(void)
{
DPAA2_QDMA_FUNC_TRACE();
DPAA2_QDMA_ERR("dmdmai disable failed");
/* Set up the DQRR storage for Rx */
- for (i = 0; i < DPDMAI_PRIO_NUM; i++) {
+ for (i = 0; i < dpdmai_dev->num_queues; i++) {
struct dpaa2_queue *rxq = &(dpdmai_dev->rx_queue[i]);
if (rxq->q_storage) {
ret);
goto init_err;
}
- dpdmai_dev->num_queues = attr.num_of_priorities;
+ dpdmai_dev->num_queues = attr.num_of_queues;
/* Set up Rx Queues */
- for (i = 0; i < attr.num_of_priorities; i++) {
+ for (i = 0; i < dpdmai_dev->num_queues; i++) {
struct dpaa2_queue *rxq;
memset(&rx_queue_cfg, 0, sizeof(struct dpdmai_rx_queue_cfg));
ret = dpdmai_set_rx_queue(&dpdmai_dev->dpdmai,
CMD_PRI_LOW,
dpdmai_dev->token,
- i, &rx_queue_cfg);
+ i, 0, &rx_queue_cfg);
if (ret) {
DPAA2_QDMA_ERR("Setting Rx queue failed with err: %d",
ret);
}
/* Get Rx and Tx queues FQID's */
- for (i = 0; i < DPDMAI_PRIO_NUM; i++) {
+ for (i = 0; i < dpdmai_dev->num_queues; i++) {
ret = dpdmai_get_rx_queue(&dpdmai_dev->dpdmai, CMD_PRI_LOW,
- dpdmai_dev->token, i, &rx_attr);
+ dpdmai_dev->token, i, 0, &rx_attr);
if (ret) {
DPAA2_QDMA_ERR("Reading device failed with err: %d",
ret);
dpdmai_dev->rx_queue[i].fqid = rx_attr.fqid;
ret = dpdmai_get_tx_queue(&dpdmai_dev->dpdmai, CMD_PRI_LOW,
- dpdmai_dev->token, i, &tx_attr);
+ dpdmai_dev->token, i, 0, &tx_attr);
if (ret) {
DPAA2_QDMA_ERR("Reading device failed with err: %d",
ret);