net/ice: clean input set macro definition

[dpdk.git] / drivers / raw / dpaa2_qdma / dpaa2_qdma.h

diff --git a/drivers/raw/dpaa2_qdma/dpaa2_qdma.h b/drivers/raw/dpaa2_qdma/dpaa2_qdma.h
index 4265ee8..d6f6bb5 100644 (file)
--- a/drivers/raw/dpaa2_qdma/dpaa2_qdma.h
+++ b/drivers/raw/dpaa2_qdma/dpaa2_qdma.h
@@ -11,12 +11,46 @@ struct rte_qdma_job;
 #define DPAA2_QDMA_MAX_FLE 3
 #define DPAA2_QDMA_MAX_SDD 2
 
+#define DPAA2_QDMA_MAX_SG_NB 64
+
 #define DPAA2_DPDMAI_MAX_QUEUES        8
 
-/** FLE pool size: 3 Frame list + 2 source/destination descriptor */
-#define QDMA_FLE_POOL_SIZE (sizeof(struct rte_qdma_job *) + \
+/** FLE single job pool size: job pointer(uint64_t) +
+ * 3 Frame list + 2 source/destination descriptor.
+ */
+#define QDMA_FLE_SINGLE_POOL_SIZE (sizeof(uint64_t) + \
+                       sizeof(struct qbman_fle) * DPAA2_QDMA_MAX_FLE + \
+                       sizeof(struct qdma_sdd) * DPAA2_QDMA_MAX_SDD)
+
+/** FLE sg jobs pool size: job number(uint64_t) +
+ * 3 Frame list + 2 source/destination descriptor  +
+ * 64 (src + dst) sg entries + 64 jobs pointers.
+ */
+#define QDMA_FLE_SG_POOL_SIZE (sizeof(uint64_t) + \
                sizeof(struct qbman_fle) * DPAA2_QDMA_MAX_FLE + \
+               sizeof(struct qdma_sdd) * DPAA2_QDMA_MAX_SDD + \
+               sizeof(struct qdma_sg_entry) * (DPAA2_QDMA_MAX_SG_NB * 2) + \
+               sizeof(struct rte_qdma_job *) * DPAA2_QDMA_MAX_SG_NB)
+
+#define QDMA_FLE_JOB_NB_OFFSET 0
+
+#define QDMA_FLE_SINGLE_JOB_OFFSET 0
+
+#define QDMA_FLE_FLE_OFFSET \
+               (QDMA_FLE_JOB_NB_OFFSET + sizeof(uint64_t))
+
+#define QDMA_FLE_SDD_OFFSET \
+               (QDMA_FLE_FLE_OFFSET + \
+               sizeof(struct qbman_fle) * DPAA2_QDMA_MAX_FLE)
+
+#define QDMA_FLE_SG_ENTRY_OFFSET \
+               (QDMA_FLE_SDD_OFFSET + \
                sizeof(struct qdma_sdd) * DPAA2_QDMA_MAX_SDD)
+
+#define QDMA_FLE_SG_JOBS_OFFSET \
+               (QDMA_FLE_SG_ENTRY_OFFSET + \
+               sizeof(struct qdma_sg_entry) * DPAA2_QDMA_MAX_SG_NB * 2)
+
 /** FLE pool cache size */
 #define QDMA_FLE_CACHE_SIZE(_num) (_num/(RTE_MAX_LCORE * 2))
 
@@ -59,10 +93,8 @@ struct qdma_device {
        uint16_t max_vqs;
        /** Device state - started or stopped */
        uint8_t state;
-       /** FLE pool for the device */
-       struct rte_mempool *fle_pool;
-       /** FLE pool size */
-       int fle_pool_count;
+       /** FLE queue pool size */
+       int fle_queue_pool_cnt;
        /** A lock to QDMA device whenever required */
        rte_spinlock_t lock;
 };
@@ -85,10 +117,12 @@ struct qdma_virt_queue;
 
 typedef uint16_t (qdma_get_job_t)(struct qdma_virt_queue *qdma_vq,
                                        const struct qbman_fd *fd,
-                                       struct rte_qdma_job **job);
+                                       struct rte_qdma_job **job,
+                                       uint16_t *nb_jobs);
 typedef int (qdma_set_fd_t)(struct qdma_virt_queue *qdma_vq,
                                        struct qbman_fd *fd,
-                                       struct rte_qdma_job *job);
+                                       struct rte_qdma_job **job,
+                                       uint16_t nb_jobs);
 
 typedef int (qdma_dequeue_multijob_t)(
                                struct qdma_virt_queue *qdma_vq,
@@ -107,6 +141,8 @@ struct qdma_virt_queue {
        struct rte_ring *status_ring;
        /** Associated hw queue */
        struct qdma_hw_queue *hw_queue;
+       /** FLE pool for the queue */
+       struct rte_mempool *fle_pool;
        /** Route by port */
        struct rte_qdma_rbp rbp;
        /** Associated lcore id */
@@ -121,6 +157,7 @@ struct qdma_virt_queue {
        uint64_t num_dequeues;
 
        uint16_t vq_id;
+       uint32_t flags;
 
        qdma_set_fd_t *set_fd;
        qdma_get_job_t *get_job;
@@ -186,6 +223,43 @@ struct qdma_sdd {
        };
 } __rte_packed;
 
+#define QDMA_SG_FMT_SDB        0x0 /* single data buffer */
+#define QDMA_SG_FMT_FDS        0x1 /* frame data section */
+#define QDMA_SG_FMT_SGTE       0x2 /* SGT extension */
+#define QDMA_SG_SL_SHORT       0x1 /* short length */
+#define QDMA_SG_SL_LONG        0x0 /* long length */
+#define QDMA_SG_F      0x1 /* last sg entry */
+#define QDMA_SG_BMT_ENABLE 0x1
+#define QDMA_SG_BMT_DISABLE 0x0
+
+struct qdma_sg_entry {
+       uint32_t addr_lo;               /* address 0:31 */
+       uint32_t addr_hi:17;    /* address 32:48 */
+       uint32_t rsv:15;
+       union {
+               uint32_t data_len_sl0;  /* SL=0, the long format */
+               struct {
+                       uint32_t len:17;        /* SL=1, the short format */
+                       uint32_t reserve:3;
+                       uint32_t sf:1;
+                       uint32_t sr:1;
+                       uint32_t size:10;       /* buff size */
+               } data_len_sl1;
+       } data_len;                                     /* AVAIL_LENGTH */
+       union {
+               uint32_t ctrl_fields;
+               struct {
+                       uint32_t bpid:14;
+                       uint32_t ivp:1;
+                       uint32_t bmt:1;
+                       uint32_t offset:12;
+                       uint32_t fmt:2;
+                       uint32_t sl:1;
+                       uint32_t f:1;
+               } ctrl;
+       };
+} __rte_packed;
+
 /** Represents a DPDMAI raw device */
 struct dpaa2_dpdmai_dev {
        /** Pointer to Next device instance */