common/cnxk: support tunnel header verification

[dpdk.git] / drivers / raw / ifpga / base / opae_hw_api.h

diff --git a/drivers/raw/ifpga/base/opae_hw_api.h b/drivers/raw/ifpga/base/opae_hw_api.h
index b78fbd5..7e04b56 100644 (file)
--- a/drivers/raw/ifpga/base/opae_hw_api.h
+++ b/drivers/raw/ifpga/base/opae_hw_api.h
@@ -40,6 +40,7 @@ struct opae_manager {
        struct opae_adapter *adapter;
        struct opae_manager_ops *ops;
        struct opae_manager_networking_ops *network_ops;
+       struct opae_sensor_list *sensor_list;
        void *data;
 };
 
@@ -54,6 +55,11 @@ struct opae_manager_ops {
                        unsigned int *value);
        int (*get_board_info)(struct opae_manager *mgr,
                        struct opae_board_info **info);
+       int (*get_uuid)(struct opae_manager *mgr, struct uuid *uuid);
+       int (*update_flash)(struct opae_manager *mgr, const char *image,
+                       u64 *status);
+       int (*stop_flash_update)(struct opae_manager *mgr, int force);
+       int (*reload)(struct opae_manager *mgr, int type, int page);
 };
 
 /* networking management ops in FME */
@@ -75,9 +81,8 @@ struct opae_manager_networking_ops {
                        struct opae_retimer_status *status);
 };
 
-extern struct opae_sensor_list opae_sensor_list;
-#define opae_mgr_for_each_sensor(sensor) \
-       TAILQ_FOREACH(sensor, &opae_sensor_list, node)
+#define opae_mgr_for_each_sensor(mgr, sensor) \
+       TAILQ_FOREACH(sensor, mgr->sensor_list, node)
 
 /* OPAE Manager APIs */
 struct opae_manager *
@@ -88,8 +93,10 @@ int opae_manager_flash(struct opae_manager *mgr, int acc_id, const char *buf,
                       u32 size, u64 *status);
 int opae_manager_get_eth_group_region_info(struct opae_manager *mgr,
                u8 group_id, struct opae_eth_group_region_info *info);
-struct opae_sensor_info *opae_mgr_get_sensor_by_name(const char *name);
-struct opae_sensor_info *opae_mgr_get_sensor_by_id(unsigned int id);
+struct opae_sensor_info *opae_mgr_get_sensor_by_name(struct opae_manager *mgr,
+               const char *name);
+struct opae_sensor_info *opae_mgr_get_sensor_by_id(struct opae_manager *mgr,
+               unsigned int id);
 int opae_mgr_get_sensor_value_by_name(struct opae_manager *mgr,
                const char *name, unsigned int *value);
 int opae_mgr_get_sensor_value_by_id(struct opae_manager *mgr,
@@ -241,6 +248,9 @@ struct opae_adapter_data_pci {
        enum opae_adapter_type type;
        u16 device_id;
        u16 vendor_id;
+       u16 bus; /*Device bus for PCI */
+       u16 devid; /* Device ID */
+       u16 function; /* Device function */
        struct opae_reg_region region[PCI_MAX_RESOURCE];
        int vfio_dev_fd;  /* VFIO device file descriptor */
 };
@@ -260,12 +270,38 @@ TAILQ_HEAD(opae_accelerator_list, opae_accelerator);
 #define opae_adapter_for_each_acc(adatper, acc) \
        TAILQ_FOREACH(acc, &adapter->acc_list, node)
 
+#define SHM_PREFIX     "/IFPGA:"
+#define SHM_BLK_SIZE   0x2000
+
+typedef struct {
+       union {
+               u8 byte[SHM_BLK_SIZE];
+               struct {
+                       pthread_mutex_t spi_mutex;
+                       pthread_mutex_t i2c_mutex;
+                       u32 ref_cnt;    /* reference count of shared memory */
+                       u32 dtb_size;   /* actual length of DTB data in byte */
+                       u32 rsu_ctrl;   /* used to control rsu */
+                       u32 rsu_stat;   /* used to report status for rsu */
+               };
+       };
+       u8 dtb[SHM_BLK_SIZE];   /* DTB data */
+} opae_share_data;
+
+typedef struct  {
+       int id;       /* shared memory id returned by shm_open */
+       u32 size;     /* size of shared memory in byte */
+       void *ptr;    /* start address of shared memory */
+} opae_share_memory;
+
 struct opae_adapter {
        const char *name;
        struct opae_manager *mgr;
        struct opae_accelerator_list acc_list;
        struct opae_adapter_ops *ops;
        void *data;
+       pthread_mutex_t *lock;   /* multi-process mutex for IFPGA */
+       opae_share_memory shm;
 };
 
 /* OPAE Adapter APIs */
@@ -275,7 +311,8 @@ void *opae_adapter_data_alloc(enum opae_adapter_type type);
 int opae_adapter_init(struct opae_adapter *adapter,
                const char *name, void *data);
 #define opae_adapter_free(adapter) opae_free(adapter)
-
+int opae_adapter_lock(struct opae_adapter *adapter, int timeout);
+int opae_adapter_unlock(struct opae_adapter *adapter);
 int opae_adapter_enumerate(struct opae_adapter *adapter);
 void opae_adapter_destroy(struct opae_adapter *adapter);
 static inline struct opae_manager *
@@ -304,7 +341,7 @@ static inline void opae_adapter_remove_acc(struct opae_adapter *adapter,
 
 struct opae_ether_addr {
        unsigned char addr_bytes[OPAE_ETHER_ADDR_LEN];
-} __attribute__((__packed__));
+} __rte_packed;
 
 /* OPAE vBNG network API*/
 int opae_manager_read_mac_rom(struct opae_manager *mgr, int port,
@@ -324,4 +361,9 @@ int opae_manager_eth_group_read_reg(struct opae_manager *mgr, u8 group_id,
                u8 type, u8 index, u16 addr, u32 *data);
 int opae_mgr_get_board_info(struct opae_manager *mgr,
                struct opae_board_info **info);
+int opae_mgr_get_uuid(struct opae_manager *mgr, struct uuid *uuid);
+int opae_mgr_update_flash(struct opae_manager *mgr, const char *image,
+               uint64_t *status);
+int opae_mgr_stop_flash_update(struct opae_manager *mgr, int force);
+int opae_mgr_reload(struct opae_manager *mgr, int type, int page);
 #endif /* _OPAE_HW_API_H_*/