#include <rte_common.h>
#include <rte_bus_vdev.h>
#include <rte_string_fns.h>
+#include <rte_pmd_i40e.h>
#include "base/opae_hw_api.h"
#include "base/opae_ifpga_hw_api.h"
#define RTE_PCI_EXT_CAP_ID(header) (int)(header & 0x0000ffff)
#define RTE_PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc)
-int ifpga_rawdev_logtype;
-
#define PCI_VENDOR_ID_INTEL 0x8086
/* PCI Device ID */
#define PCIE_DEVICE_ID_PF_INT_5_X 0xBCBD
static int ifpga_monitor_start;
static pthread_t ifpga_monitor_start_thread;
+#define IFPGA_MAX_IRQ 12
+/* 0 for FME interrupt, others are reserved for AFU irq */
+static struct rte_intr_handle ifpga_irq_handle[IFPGA_MAX_IRQ];
+
static struct ifpga_rawdev *
ifpga_rawdev_allocate(struct rte_rawdev *rawdev);
static int set_surprise_link_check_aer(
if (!mgr)
return -ENODEV;
- opae_mgr_for_each_sensor(sensor) {
+ opae_mgr_for_each_sensor(mgr, sensor) {
if (!(sensor->flags & OPAE_SENSOR_VALID))
goto fail;
goto fail;
if (value == 0xdeadbeef) {
- IFPGA_RAWDEV_PMD_ERR("sensor %s is invalid value %x\n",
- sensor->name, value);
+ IFPGA_RAWDEV_PMD_ERR("dev_id %d sensor %s value %x\n",
+ raw_dev->dev_id, sensor->name, value);
continue;
}
/* monitor 12V AUX sensor */
if (!strcmp(sensor->name, "12V AUX Voltage")) {
if (value < AUX_VOLTAGE_WARN) {
- IFPGA_RAWDEV_PMD_INFO("%s reach theshold %d\n",
- sensor->name, value);
+ IFPGA_RAWDEV_PMD_INFO(
+ "%s reach theshold %d mV\n",
+ sensor->name, value);
*gsd_start = true;
break;
}
static void
ifpga_rawdev_info_get(struct rte_rawdev *dev,
- rte_rawdev_obj_t dev_info)
+ rte_rawdev_obj_t dev_info,
+ size_t dev_info_size)
{
struct opae_adapter *adapter;
struct opae_accelerator *acc;
IFPGA_RAWDEV_PMD_FUNC_TRACE();
- if (!dev_info) {
+ if (!dev_info || dev_info_size != sizeof(*afu_dev)) {
IFPGA_RAWDEV_PMD_ERR("Invalid request");
return;
}
rte_rawdev_obj_t pr_conf)
{
struct opae_adapter *adapter;
+ struct opae_manager *mgr;
+ struct opae_board_info *info;
struct rte_afu_pr_conf *afu_pr_conf;
int ret;
struct uuid uuid;
}
}
- acc = opae_adapter_get_acc(adapter, afu_pr_conf->afu_id.port);
- if (!acc)
- return -ENODEV;
+ mgr = opae_adapter_get_mgr(adapter);
+ if (!mgr) {
+ IFPGA_RAWDEV_PMD_ERR("opae_manager of opae_adapter is NULL");
+ return -1;
+ }
- ret = opae_acc_get_uuid(acc, &uuid);
- if (ret)
- return ret;
+ if (ifpga_mgr_ops.get_board_info(mgr, &info)) {
+ IFPGA_RAWDEV_PMD_ERR("ifpga manager get_board_info fail!");
+ return -1;
+ }
- rte_memcpy(&afu_pr_conf->afu_id.uuid.uuid_low, uuid.b, sizeof(u64));
- rte_memcpy(&afu_pr_conf->afu_id.uuid.uuid_high,
- uuid.b + 8, sizeof(u64));
+ if (info->lightweight) {
+ /* set uuid to all 0, when fpga is lightweight image */
+ memset(&afu_pr_conf->afu_id.uuid.uuid_low, 0, sizeof(u64));
+ memset(&afu_pr_conf->afu_id.uuid.uuid_high, 0, sizeof(u64));
+ } else {
+ acc = opae_adapter_get_acc(adapter, afu_pr_conf->afu_id.port);
+ if (!acc)
+ return -ENODEV;
- IFPGA_RAWDEV_PMD_INFO("%s: uuid_l=0x%lx, uuid_h=0x%lx\n", __func__,
- (unsigned long)afu_pr_conf->afu_id.uuid.uuid_low,
- (unsigned long)afu_pr_conf->afu_id.uuid.uuid_high);
+ ret = opae_acc_get_uuid(acc, &uuid);
+ if (ret)
+ return ret;
+
+ rte_memcpy(&afu_pr_conf->afu_id.uuid.uuid_low, uuid.b,
+ sizeof(u64));
+ rte_memcpy(&afu_pr_conf->afu_id.uuid.uuid_high, uuid.b + 8,
+ sizeof(u64));
+ IFPGA_RAWDEV_PMD_INFO("%s: uuid_l=0x%lx, uuid_h=0x%lx\n",
+ __func__,
+ (unsigned long)afu_pr_conf->afu_id.uuid.uuid_low,
+ (unsigned long)afu_pr_conf->afu_id.uuid.uuid_high);
+ }
return 0;
}
return 0;
}
+static int fme_clean_fme_error(struct opae_manager *mgr)
+{
+ u64 val;
+
+ if (ifpga_get_fme_error_prop(mgr, FME_ERR_PROP_ERRORS, &val))
+ return -EINVAL;
+
+ IFPGA_RAWDEV_PMD_DEBUG("before clean 0x%" PRIx64 "\n", val);
+
+ ifpga_set_fme_error_prop(mgr, FME_ERR_PROP_CLEAR, val);
+
+ if (ifpga_get_fme_error_prop(mgr, FME_ERR_PROP_ERRORS, &val))
+ return -EINVAL;
+
+ IFPGA_RAWDEV_PMD_DEBUG("after clean 0x%" PRIx64 "\n", val);
+
+ return 0;
+}
+
static int
fme_err_handle_error0(struct opae_manager *mgr)
{
if (ifpga_get_fme_error_prop(mgr, FME_ERR_PROP_ERRORS, &val))
return -EINVAL;
+ if (fme_clean_fme_error(mgr))
+ return -EINVAL;
+
fme_error0.csr = val;
if (fme_error0.fabric_err)
fme_err_handle_catfatal_error(mgr);
}
-static struct rte_intr_handle fme_intr_handle;
+int
+ifpga_unregister_msix_irq(enum ifpga_irq_type type,
+ int vec_start, rte_intr_callback_fn handler, void *arg)
+{
+ struct rte_intr_handle intr_handle;
+
+ if (type == IFPGA_FME_IRQ)
+ intr_handle = ifpga_irq_handle[0];
+ else if (type == IFPGA_AFU_IRQ)
+ intr_handle = ifpga_irq_handle[vec_start + 1];
+
+ rte_intr_efd_disable(&intr_handle);
-static int ifpga_register_fme_interrupt(struct opae_manager *mgr)
+ return rte_intr_callback_unregister(&intr_handle,
+ handler, arg);
+}
+
+int
+ifpga_register_msix_irq(struct rte_rawdev *dev, int port_id,
+ enum ifpga_irq_type type, int vec_start, int count,
+ rte_intr_callback_fn handler, const char *name,
+ void *arg)
{
int ret;
- struct fpga_fme_err_irq_set err_irq_set;
+ struct rte_intr_handle intr_handle;
+ struct opae_adapter *adapter;
+ struct opae_manager *mgr;
+ struct opae_accelerator *acc;
- fme_intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
+ adapter = ifpga_rawdev_get_priv(dev);
+ if (!adapter)
+ return -ENODEV;
- ret = rte_intr_efd_enable(&fme_intr_handle, 1);
- if (ret)
- return -EINVAL;
+ mgr = opae_adapter_get_mgr(adapter);
+ if (!mgr)
+ return -ENODEV;
- fme_intr_handle.fd = fme_intr_handle.efds[0];
+ if (type == IFPGA_FME_IRQ) {
+ intr_handle = ifpga_irq_handle[0];
+ count = 1;
+ } else if (type == IFPGA_AFU_IRQ)
+ intr_handle = ifpga_irq_handle[vec_start + 1];
- IFPGA_RAWDEV_PMD_DEBUG("vfio_dev_fd=%d, efd=%d, fd=%d\n",
- fme_intr_handle.vfio_dev_fd,
- fme_intr_handle.efds[0], fme_intr_handle.fd);
+ intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
- err_irq_set.evtfd = fme_intr_handle.efds[0];
- ret = opae_manager_ifpga_set_err_irq(mgr, &err_irq_set);
+ ret = rte_intr_efd_enable(&intr_handle, count);
if (ret)
- return -EINVAL;
+ return -ENODEV;
+
+ intr_handle.fd = intr_handle.efds[0];
+
+ IFPGA_RAWDEV_PMD_DEBUG("register %s irq, vfio_fd=%d, fd=%d\n",
+ name, intr_handle.vfio_dev_fd,
+ intr_handle.fd);
+
+ if (type == IFPGA_FME_IRQ) {
+ struct fpga_fme_err_irq_set err_irq_set;
+ err_irq_set.evtfd = intr_handle.efds[0];
+
+ ret = opae_manager_ifpga_set_err_irq(mgr, &err_irq_set);
+ if (ret)
+ return -EINVAL;
+ } else if (type == IFPGA_AFU_IRQ) {
+ acc = opae_adapter_get_acc(adapter, port_id);
+ if (!acc)
+ return -EINVAL;
+
+ ret = opae_acc_set_irq(acc, vec_start, count, intr_handle.efds);
+ if (ret)
+ return -EINVAL;
+ }
- /* register FME interrupt using DPDK API */
- ret = rte_intr_callback_register(&fme_intr_handle,
- fme_interrupt_handler,
- (void *)mgr);
+ /* register interrupt handler using DPDK API */
+ ret = rte_intr_callback_register(&intr_handle,
+ handler, (void *)arg);
if (ret)
return -EINVAL;
- IFPGA_RAWDEV_PMD_INFO("success register fme interrupt\n");
+ IFPGA_RAWDEV_PMD_INFO("success register %s interrupt\n", name);
return 0;
}
-static int
-ifpga_unregister_fme_interrupt(struct opae_manager *mgr)
-{
- rte_intr_efd_disable(&fme_intr_handle);
-
- return rte_intr_callback_unregister(&fme_intr_handle,
- fme_interrupt_handler,
- (void *)mgr);
-}
-
static int
ifpga_rawdev_create(struct rte_pci_device *pci_dev,
int socket_id)
goto cleanup;
}
+ ipn3ke_bridge_func.get_ifpga_rawdev = ifpga_rawdev_get;
+ ipn3ke_bridge_func.set_i40e_sw_dev = rte_pmd_i40e_set_switch_dev;
+
dev = ifpga_rawdev_allocate(rawdev);
if (dev == NULL) {
IFPGA_RAWDEV_PMD_ERR("Unable to allocate ifpga_rawdevice");
}
data->device_id = pci_dev->id.device_id;
data->vendor_id = pci_dev->id.vendor_id;
+ data->bus = pci_dev->addr.bus;
+ data->devid = pci_dev->addr.devid;
+ data->function = pci_dev->addr.function;
data->vfio_dev_fd = pci_dev->intr_handle.vfio_dev_fd;
adapter = rawdev->dev_private;
IFPGA_RAWDEV_PMD_INFO("this is a PF function");
}
- ret = ifpga_register_fme_interrupt(mgr);
+ ret = ifpga_register_msix_irq(rawdev, 0, IFPGA_FME_IRQ, 0, 0,
+ fme_interrupt_handler, "fme_irq", mgr);
if (ret)
goto free_adapter_data;
if (!mgr)
return -ENODEV;
- if (ifpga_unregister_fme_interrupt(mgr))
+ if (ifpga_unregister_msix_irq(IFPGA_FME_IRQ, 0,
+ fme_interrupt_handler, mgr))
return -EINVAL;
opae_adapter_data_free(adapter->data);
RTE_PMD_REGISTER_PCI(ifpga_rawdev_pci_driver, rte_ifpga_rawdev_pmd);
RTE_PMD_REGISTER_PCI_TABLE(ifpga_rawdev_pci_driver, rte_ifpga_rawdev_pmd);
RTE_PMD_REGISTER_KMOD_DEP(ifpga_rawdev_pci_driver, "* igb_uio | uio_pci_generic | vfio-pci");
-
-RTE_INIT(ifpga_rawdev_init_log)
-{
- ifpga_rawdev_logtype = rte_log_register("driver.raw.init");
- if (ifpga_rawdev_logtype >= 0)
- rte_log_set_level(ifpga_rawdev_logtype, RTE_LOG_NOTICE);
-}
+RTE_LOG_REGISTER(ifpga_rawdev_logtype, driver.raw.init, NOTICE);
static const char * const valid_args[] = {
#define IFPGA_ARG_NAME "ifpga"
git.droids-corp.org / dpdk.git / blobdiff