#include "ifpga_rawdev.h"
#include "ipn3ke_rawdev_api.h"
-#define RTE_PCI_EXT_CAP_ID_ERR 0x01 /* Advanced Error Reporting */
-#define RTE_PCI_CFG_SPACE_SIZE 256
-#define RTE_PCI_CFG_SPACE_EXP_SIZE 4096
-#define RTE_PCI_EXT_CAP_ID(header) (int)(header & 0x0000ffff)
-#define RTE_PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc)
-
-int ifpga_rawdev_logtype;
-
#define PCI_VENDOR_ID_INTEL 0x8086
/* PCI Device ID */
#define PCIE_DEVICE_ID_PF_INT_5_X 0xBCBD
static int ifpga_monitor_start;
static pthread_t ifpga_monitor_start_thread;
+#define IFPGA_MAX_IRQ 12
+/* 0 for FME interrupt, others are reserved for AFU irq */
+static struct rte_intr_handle ifpga_irq_handle[IFPGA_MAX_IRQ];
+
static struct ifpga_rawdev *
ifpga_rawdev_allocate(struct rte_rawdev *rawdev);
static int set_surprise_link_check_aer(
struct ifpga_rawdev *ifpga_rdev, int force_disable);
static int ifpga_pci_find_next_ext_capability(unsigned int fd,
- int start, int cap);
-static int ifpga_pci_find_ext_capability(unsigned int fd, int cap);
+ int start, uint32_t cap);
+static int ifpga_pci_find_ext_capability(unsigned int fd, uint32_t cap);
struct ifpga_rawdev *
ifpga_rawdev_get(const struct rte_rawdev *rawdev)
return dev;
}
-static int ifpga_pci_find_next_ext_capability(unsigned int fd,
-int start, int cap)
+static int
+ifpga_pci_find_next_ext_capability(unsigned int fd, int start, uint32_t cap)
{
uint32_t header;
int ttl;
return 0;
}
-static int ifpga_pci_find_ext_capability(unsigned int fd, int cap)
+static int
+ifpga_pci_find_ext_capability(unsigned int fd, uint32_t cap)
{
return ifpga_pci_find_next_ext_capability(fd, 0, cap);
}
return 0;
}
-static void
+static int
ifpga_rawdev_info_get(struct rte_rawdev *dev,
- rte_rawdev_obj_t dev_info)
+ rte_rawdev_obj_t dev_info,
+ size_t dev_info_size)
{
struct opae_adapter *adapter;
struct opae_accelerator *acc;
IFPGA_RAWDEV_PMD_FUNC_TRACE();
- if (!dev_info) {
+ if (!dev_info || dev_info_size != sizeof(*afu_dev)) {
IFPGA_RAWDEV_PMD_ERR("Invalid request");
- return;
+ return -EINVAL;
}
adapter = ifpga_rawdev_get_priv(dev);
if (!adapter)
- return;
+ return -ENOENT;
afu_dev = dev_info;
afu_dev->rawdev = dev;
if (ifpga_fill_afu_dev(acc, afu_dev)) {
IFPGA_RAWDEV_PMD_ERR("cannot get info\n");
- return;
+ return -ENOENT;
}
}
/* get LineSide BAR Index */
if (opae_manager_get_eth_group_region_info(mgr, 0,
&opae_lside_eth_info)) {
- return;
+ return -ENOENT;
}
lside_bar_idx = opae_lside_eth_info.mem_idx;
/* get NICSide BAR Index */
if (opae_manager_get_eth_group_region_info(mgr, 1,
&opae_nside_eth_info)) {
- return;
+ return -ENOENT;
}
nside_bar_idx = opae_nside_eth_info.mem_idx;
if (lside_bar_idx >= PCI_MAX_RESOURCE ||
nside_bar_idx >= PCI_MAX_RESOURCE ||
lside_bar_idx == nside_bar_idx)
- return;
+ return -ENOENT;
/* fill LineSide BAR Index */
afu_dev->mem_resource[lside_bar_idx].phys_addr =
afu_dev->mem_resource[nside_bar_idx].addr =
opae_nside_eth_info.addr;
}
+ return 0;
}
static int
ifpga_rawdev_configure(const struct rte_rawdev *dev,
- rte_rawdev_obj_t config)
+ rte_rawdev_obj_t config,
+ size_t config_size __rte_unused)
{
IFPGA_RAWDEV_PMD_FUNC_TRACE();
fme_err_handle_catfatal_error(mgr);
}
-static struct rte_intr_handle fme_intr_handle;
+int
+ifpga_unregister_msix_irq(enum ifpga_irq_type type,
+ int vec_start, rte_intr_callback_fn handler, void *arg)
+{
+ struct rte_intr_handle intr_handle;
+
+ if (type == IFPGA_FME_IRQ)
+ intr_handle = ifpga_irq_handle[0];
+ else if (type == IFPGA_AFU_IRQ)
+ intr_handle = ifpga_irq_handle[vec_start + 1];
-static int ifpga_register_fme_interrupt(struct opae_manager *mgr)
+ rte_intr_efd_disable(&intr_handle);
+
+ return rte_intr_callback_unregister(&intr_handle,
+ handler, arg);
+}
+
+int
+ifpga_register_msix_irq(struct rte_rawdev *dev, int port_id,
+ enum ifpga_irq_type type, int vec_start, int count,
+ rte_intr_callback_fn handler, const char *name,
+ void *arg)
{
int ret;
- struct fpga_fme_err_irq_set err_irq_set;
+ struct rte_intr_handle intr_handle;
+ struct opae_adapter *adapter;
+ struct opae_manager *mgr;
+ struct opae_accelerator *acc;
- fme_intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
+ adapter = ifpga_rawdev_get_priv(dev);
+ if (!adapter)
+ return -ENODEV;
- ret = rte_intr_efd_enable(&fme_intr_handle, 1);
- if (ret)
- return -EINVAL;
+ mgr = opae_adapter_get_mgr(adapter);
+ if (!mgr)
+ return -ENODEV;
- fme_intr_handle.fd = fme_intr_handle.efds[0];
+ if (type == IFPGA_FME_IRQ) {
+ intr_handle = ifpga_irq_handle[0];
+ count = 1;
+ } else if (type == IFPGA_AFU_IRQ)
+ intr_handle = ifpga_irq_handle[vec_start + 1];
- IFPGA_RAWDEV_PMD_DEBUG("vfio_dev_fd=%d, efd=%d, fd=%d\n",
- fme_intr_handle.vfio_dev_fd,
- fme_intr_handle.efds[0], fme_intr_handle.fd);
+ intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
- err_irq_set.evtfd = fme_intr_handle.efds[0];
- ret = opae_manager_ifpga_set_err_irq(mgr, &err_irq_set);
+ ret = rte_intr_efd_enable(&intr_handle, count);
if (ret)
- return -EINVAL;
+ return -ENODEV;
+
+ intr_handle.fd = intr_handle.efds[0];
+
+ IFPGA_RAWDEV_PMD_DEBUG("register %s irq, vfio_fd=%d, fd=%d\n",
+ name, intr_handle.vfio_dev_fd,
+ intr_handle.fd);
+
+ if (type == IFPGA_FME_IRQ) {
+ struct fpga_fme_err_irq_set err_irq_set;
+ err_irq_set.evtfd = intr_handle.efds[0];
+
+ ret = opae_manager_ifpga_set_err_irq(mgr, &err_irq_set);
+ if (ret)
+ return -EINVAL;
+ } else if (type == IFPGA_AFU_IRQ) {
+ acc = opae_adapter_get_acc(adapter, port_id);
+ if (!acc)
+ return -EINVAL;
- /* register FME interrupt using DPDK API */
- ret = rte_intr_callback_register(&fme_intr_handle,
- fme_interrupt_handler,
- (void *)mgr);
+ ret = opae_acc_set_irq(acc, vec_start, count, intr_handle.efds);
+ if (ret)
+ return -EINVAL;
+ }
+
+ /* register interrupt handler using DPDK API */
+ ret = rte_intr_callback_register(&intr_handle,
+ handler, (void *)arg);
if (ret)
return -EINVAL;
- IFPGA_RAWDEV_PMD_INFO("success register fme interrupt\n");
+ IFPGA_RAWDEV_PMD_INFO("success register %s interrupt\n", name);
return 0;
}
-static int
-ifpga_unregister_fme_interrupt(struct opae_manager *mgr)
-{
- rte_intr_efd_disable(&fme_intr_handle);
-
- return rte_intr_callback_unregister(&fme_intr_handle,
- fme_interrupt_handler,
- (void *)mgr);
-}
-
static int
ifpga_rawdev_create(struct rte_pci_device *pci_dev,
int socket_id)
IFPGA_RAWDEV_PMD_INFO("this is a PF function");
}
- ret = ifpga_register_fme_interrupt(mgr);
+ ret = ifpga_register_msix_irq(rawdev, 0, IFPGA_FME_IRQ, 0, 0,
+ fme_interrupt_handler, "fme_irq", mgr);
if (ret)
goto free_adapter_data;
if (!mgr)
return -ENODEV;
- if (ifpga_unregister_fme_interrupt(mgr))
+ if (ifpga_unregister_msix_irq(IFPGA_FME_IRQ, 0,
+ fme_interrupt_handler, mgr))
return -EINVAL;
opae_adapter_data_free(adapter->data);
RTE_PMD_REGISTER_PCI(ifpga_rawdev_pci_driver, rte_ifpga_rawdev_pmd);
RTE_PMD_REGISTER_PCI_TABLE(ifpga_rawdev_pci_driver, rte_ifpga_rawdev_pmd);
RTE_PMD_REGISTER_KMOD_DEP(ifpga_rawdev_pci_driver, "* igb_uio | uio_pci_generic | vfio-pci");
-
-RTE_INIT(ifpga_rawdev_init_log)
-{
- ifpga_rawdev_logtype = rte_log_register("driver.raw.init");
- if (ifpga_rawdev_logtype >= 0)
- rte_log_set_level(ifpga_rawdev_logtype, RTE_LOG_NOTICE);
-}
+RTE_LOG_REGISTER(ifpga_rawdev_logtype, driver.raw.init, NOTICE);
static const char * const valid_args[] = {
#define IFPGA_ARG_NAME "ifpga"
git.droids-corp.org / dpdk.git / blobdiff