common/sfc_efx/base: separate target EvQ and IRQ config

[dpdk.git] / drivers / raw / octeontx2_ep / otx2_ep_rawdev.h

diff --git a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
index bb36b6a..dab2fb7 100644 (file)
--- a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
+++ b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
@@ -8,6 +8,10 @@
 #include <rte_byteorder.h>
 #include <rte_spinlock.h>
 
+/* IQ instruction req types */
+#define SDP_REQTYPE_NONE             (0)
+#define SDP_REQTYPE_NORESP           (1)
+#define SDP_REQTYPE_NORESP_GATHER    (2)
 
 /* Input Request Header format */
 struct sdp_instr_irh {
@@ -128,6 +132,13 @@ struct sdp_instr_list {
 };
 #define SDP_IQREQ_LIST_SIZE    (sizeof(struct sdp_instr_list))
 
+/* Input Queue statistics. Each input queue has four stats fields. */
+struct sdp_iq_stats {
+       uint64_t instr_posted; /* Instructions posted to this queue. */
+       uint64_t instr_processed; /* Instructions processed in this queue. */
+       uint64_t instr_dropped; /* Instructions that could not be processed */
+};
+
 /* Structure to define the configuration attributes for each Input queue. */
 struct sdp_iq_config {
        /* Max number of IQs available */
@@ -195,6 +206,9 @@ struct sdp_instr_queue {
        /* Number of instructions pending to be posted to OCTEON TX2. */
        uint32_t fill_cnt;
 
+       /* Statistics for this input queue. */
+       struct sdp_iq_stats stats;
+
        /* DMA mapped base address of the input descriptor ring. */
        uint64_t base_addr_dma;
 
@@ -265,6 +279,18 @@ struct sdp_recv_buffer {
 };
 #define SDP_DROQ_RECVBUF_SIZE  (sizeof(struct sdp_recv_buffer))
 
+/* DROQ statistics. Each output queue has four stats fields. */
+struct sdp_droq_stats {
+       /* Number of packets received in this queue. */
+       uint64_t pkts_received;
+
+       /* Bytes received by this queue. */
+       uint64_t bytes_received;
+
+       /* Num of failures of rte_pktmbuf_alloc() */
+       uint64_t rx_alloc_failure;
+};
+
 /* Structure to define the configuration attributes for each Output queue. */
 struct sdp_oq_config {
        /* Max number of OQs available */
@@ -331,6 +357,9 @@ struct sdp_droq {
         */
        void *pkts_sent_reg;
 
+       /* Statistics for this DROQ. */
+       struct sdp_droq_stats stats;
+
        /* DMA mapped address of the DROQ descriptor ring. */
        size_t desc_ring_dma;
 
@@ -378,10 +407,18 @@ struct sdp_config {
 struct sdp_fn_list {
        void (*setup_iq_regs)(struct sdp_device *sdpvf, uint32_t q_no);
        void (*setup_oq_regs)(struct sdp_device *sdpvf, uint32_t q_no);
+
        int (*setup_device_regs)(struct sdp_device *sdpvf);
+       uint32_t (*update_iq_read_idx)(struct sdp_instr_queue *iq);
+
        void (*enable_io_queues)(struct sdp_device *sdpvf);
+       void (*disable_io_queues)(struct sdp_device *sdpvf);
+
        void (*enable_iq)(struct sdp_device *sdpvf, uint32_t q_no);
+       void (*disable_iq)(struct sdp_device *sdpvf, uint32_t q_no);
+
        void (*enable_oq)(struct sdp_device *sdpvf, uint32_t q_no);
+       void (*disable_oq)(struct sdp_device *sdpvf, uint32_t q_no);
 };
 
 /* SRIOV information */
@@ -447,7 +484,16 @@ struct sdp_device {
 
 const struct sdp_config *sdp_get_defconf(struct sdp_device *sdp_dev);
 int sdp_setup_iqs(struct sdp_device *sdpvf, uint32_t iq_no);
+int sdp_delete_iqs(struct sdp_device *sdpvf, uint32_t iq_no);
 
 int sdp_setup_oqs(struct sdp_device *sdpvf, uint32_t oq_no);
+int sdp_delete_oqs(struct sdp_device *sdpvf, uint32_t oq_no);
+
+int sdp_rawdev_enqueue(struct rte_rawdev *dev, struct rte_rawdev_buf **buffers,
+                      unsigned int count, rte_rawdev_obj_t context);
+int sdp_rawdev_dequeue(struct rte_rawdev *dev, struct rte_rawdev_buf **buffers,
+                      unsigned int count, rte_rawdev_obj_t context);
+
+int sdp_rawdev_selftest(uint16_t dev_id);
 
 #endif /* _OTX2_EP_RAWDEV_H_ */