static const struct rte_eth_conf port_conf_default = {
.rxmode = {
- .mq_mode = ETH_MQ_RX_RSS,
- .max_rx_pkt_len = ETHER_MAX_LEN,
+ .mq_mode = RTE_ETH_MQ_RX_RSS,
},
.txmode = {
- .mq_mode = ETH_MQ_TX_NONE,
+ .mq_mode = RTE_ETH_MQ_TX_NONE,
},
.rx_adv_conf = {
.rss_conf = {
- .rss_hf = ETH_RSS_IP | ETH_RSS_UDP |
- ETH_RSS_TCP | ETH_RSS_SCTP,
+ .rss_hf = RTE_ETH_RSS_IP | RTE_ETH_RSS_UDP |
+ RTE_ETH_RSS_TCP | RTE_ETH_RSS_SCTP,
}
},
};
port_init(uint16_t port, struct rte_mempool *mbuf_pool)
{
struct rte_eth_conf port_conf = port_conf_default;
- const uint16_t rxRings = 1, txRings = rte_lcore_count() - 1;
+ const uint16_t rxRings = 1, txRings = 1;
int retval;
uint16_t q;
uint16_t nb_rxd = RX_RING_SIZE;
if (!rte_eth_dev_is_valid_port(port))
return -1;
- rte_eth_dev_info_get(port, &dev_info);
- if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
+ retval = rte_eth_dev_info_get(port, &dev_info);
+ if (retval != 0) {
+ printf("Error during getting device (port %u) info: %s\n",
+ port, strerror(-retval));
+ return retval;
+ }
+
+ if (dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE)
port_conf.txmode.offloads |=
- DEV_TX_OFFLOAD_MBUF_FAST_FREE;
+ RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
port_conf.rx_adv_conf.rss_conf.rss_hf &=
dev_info.flow_type_rss_offloads;
return retval;
struct rte_eth_link link;
- rte_eth_link_get_nowait(port, &link);
- while (!link.link_status) {
+ do {
+ retval = rte_eth_link_get_nowait(port, &link);
+ if (retval < 0) {
+ printf("Failed link get (port %u): %s\n",
+ port, rte_strerror(-retval));
+ return retval;
+ } else if (link.link_status)
+ break;
+
printf("Waiting for Link up on port %"PRIu16"\n", port);
sleep(1);
- rte_eth_link_get_nowait(port, &link);
- }
+ } while (!link.link_status);
if (!link.link_status) {
printf("Link down on port %"PRIu16"\n", port);
return 0;
}
- struct ether_addr addr;
- rte_eth_macaddr_get(port, &addr);
+ struct rte_ether_addr addr;
+ retval = rte_eth_macaddr_get(port, &addr);
+ if (retval < 0) {
+ printf("Failed to get MAC address (port %u): %s\n",
+ port, rte_strerror(-retval));
+ return retval;
+ }
+
printf("Port %u MAC: %02"PRIx8" %02"PRIx8" %02"PRIx8
" %02"PRIx8" %02"PRIx8" %02"PRIx8"\n",
- port,
- addr.addr_bytes[0], addr.addr_bytes[1],
- addr.addr_bytes[2], addr.addr_bytes[3],
- addr.addr_bytes[4], addr.addr_bytes[5]);
+ port, RTE_ETHER_ADDR_BYTES(&addr));
- rte_eth_promiscuous_enable(port);
+ retval = rte_eth_promiscuous_enable(port);
+ if (retval != 0)
+ return retval;
return 0;
}
init_power_library(void)
{
int ret = 0, lcore_id;
- RTE_LCORE_FOREACH_SLAVE(lcore_id) {
+ RTE_LCORE_FOREACH_WORKER(lcore_id) {
/* init power management library */
ret = rte_power_init(lcore_id);
if (ret) {
/* parse hexadecimal string */
pm = strtoul(portmask, &end, 16);
if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
- return -1;
-
- if (pm == 0)
- return -1;
+ return 0;
return pm;
}
* available, the higher frequency cores will go to the
* distributor first, then rx, then tx.
*/
- RTE_LCORE_FOREACH_SLAVE(lcore_id) {
+ RTE_LCORE_FOREACH_WORKER(lcore_id) {
rte_power_get_capabilities(lcore_id, &lcore_cap);
* after the high performing core assignment above, pre-assign
* them here.
*/
- RTE_LCORE_FOREACH_SLAVE(lcore_id) {
+ RTE_LCORE_FOREACH_WORKER(lcore_id) {
if (lcore_id == (unsigned int)distr_core_id ||
lcore_id == (unsigned int)rx_core_id ||
lcore_id == (unsigned int)tx_core_id)
* Kick off all the worker threads first, avoiding the pre-assigned
* lcore_ids for tx, rx and distributor workloads.
*/
- RTE_LCORE_FOREACH_SLAVE(lcore_id) {
+ RTE_LCORE_FOREACH_WORKER(lcore_id) {
if (lcore_id == (unsigned int)distr_core_id ||
lcore_id == (unsigned int)rx_core_id ||
lcore_id == (unsigned int)tx_core_id)
usleep(1000);
}
- RTE_LCORE_FOREACH_SLAVE(lcore_id) {
+ RTE_LCORE_FOREACH_WORKER(lcore_id) {
if (rte_eal_wait_lcore(lcore_id) < 0)
return -1;
}
rte_free(pd);
rte_free(pr);
+ /* clean up the EAL */
+ rte_eal_cleanup();
+
return 0;
}