.nb_event_port_enqueue_depth = 128
};
struct rte_event_dev_info dev_info;
- uint8_t disable_implicit_release;
const uint8_t event_d_id = 0; /* Always use first event device only */
uint32_t event_queue_cfg = 0;
uint16_t ethdev_count = 0;
/* Event device configurtion */
rte_event_dev_info_get(event_d_id, &dev_info);
- disable_implicit_release = !!(dev_info.event_dev_cap &
- RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE);
- evt_rsrc->disable_implicit_release =
- disable_implicit_release;
+ /* Enable implicit release */
+ if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE)
+ evt_rsrc->disable_implicit_release = 0;
if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES)
event_queue_cfg |= RTE_EVENT_QUEUE_CFG_ALL_TYPES;
event_d_conf.nb_event_port_enqueue_depth =
dev_info.max_event_port_enqueue_depth;
- num_workers = rte_lcore_count();
+ /* Ignore Master core. */
+ num_workers = rte_lcore_count() - 1;
if (dev_info.max_event_ports < num_workers)
num_workers = dev_info.max_event_ports;
l2fwd_rx_tx_adapter_setup_internal_port(struct l2fwd_resources *rsrc)
{
struct l2fwd_event_resources *evt_rsrc = rsrc->evt_rsrc;
- struct rte_event_eth_rx_adapter_queue_conf eth_q_conf = {
- .rx_queue_flags = 0,
- .ev = {
- .queue_id = 0,
- .priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
- }
- };
+ struct rte_event_eth_rx_adapter_queue_conf eth_q_conf;
uint8_t event_d_id = evt_rsrc->event_d_id;
uint16_t adapter_id = 0;
uint16_t nb_adapter = 0;
uint8_t q_id = 0;
int ret;
+ memset(ð_q_conf, 0, sizeof(eth_q_conf));
+ eth_q_conf.ev.priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
+
RTE_ETH_FOREACH_DEV(port_id) {
if ((rsrc->enabled_port_mask & (1 << port_id)) == 0)
continue;