/*-
* BSD LICENSE
- *
+ *
* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
* All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
- *
+ *
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
#include <signal.h>
#include <rte_eal.h>
-#include <rte_config.h>
#include <rte_cycles.h>
#include <rte_eal_memconfig.h>
#include <rte_debug.h>
static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
-/*
- * RX and TX Prefetch, Host, and Write-back threshold values should be
- * carefully set for optimal performance. Consult the network
- * controller's datasheet and supporting DPDK documentation for guidance
- * on how these parameters should be set.
- */
-#define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */
-#define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */
-#define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */
-
-/*
- * These default values are optimized for use with the Intel(R) 82599 10 GbE
- * Controller and the DPDK ixgbe PMD. Consider using other values for other
- * network controllers and/or network drivers.
- */
-#define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */
-#define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */
-#define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */
-
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
/* mask of enabled ports */
static struct ether_addr l2fwd_ivshmem_ports_eth_addr[RTE_MAX_ETHPORTS];
#define NB_MBUF 8192
-#define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
#define MAX_RX_QUEUE_PER_LCORE 16
#define MAX_TX_QUEUE_PER_PORT 16
},
};
-static const struct rte_eth_rxconf rx_conf = {
- .rx_thresh = {
- .pthresh = RX_PTHRESH,
- .hthresh = RX_HTHRESH,
- .wthresh = RX_WTHRESH,
- },
-};
-
-static const struct rte_eth_txconf tx_conf = {
- .tx_thresh = {
- .pthresh = TX_PTHRESH,
- .hthresh = TX_HTHRESH,
- .wthresh = TX_WTHRESH,
- },
- .tx_free_thresh = 0, /* Use PMD default values */
- .tx_rs_thresh = 0, /* Use PMD default values */
-};
-
#define METADATA_NAME "l2fwd_ivshmem"
#define CMDLINE_OPT_FWD_CONF "fwd-conf"
FILE *file;
char path[PATH_MAX];
- rte_snprintf(path, sizeof(path), QEMU_CMD_FMT, config_name);
+ snprintf(path, sizeof(path), QEMU_CMD_FMT, config_name);
file = fopen(path, "w");
if (file == NULL) {
RTE_LOG(ERR, L2FWD_IVSHMEM, "Could not open '%s' \n", path);
if (print_to_file(cmdline, config_name) < 0)
return -1;
- rte_ivshmem_metadata_dump(config_name);
+ rte_ivshmem_metadata_dump(stdout, config_name);
return 0;
}
continue;
}
/* clear all_ports_up flag if any link down */
- if (link.link_status == 0) {
+ if (link.link_status == ETH_LINK_DOWN) {
all_ports_up = 0;
break;
}
/* create a shared mbuf pool */
l2fwd_ivshmem_pktmbuf_pool =
- rte_mempool_create(MBUF_MP_NAME, NB_MBUF,
- MBUF_SIZE, 32,
- sizeof(struct rte_pktmbuf_pool_private),
- rte_pktmbuf_pool_init, NULL,
- rte_pktmbuf_init, NULL,
- rte_socket_id(), 0);
+ rte_pktmbuf_pool_create(MBUF_MP_NAME, NB_MBUF, 32,
+ 0, RTE_MBUF_DEFAULT_BUF_SIZE, rte_socket_id());
if (l2fwd_ivshmem_pktmbuf_pool == NULL)
rte_exit(EXIT_FAILURE, "Cannot init mbuf pool\n");
- /* init driver(s) */
- if (rte_pmd_init_all() < 0)
- rte_exit(EXIT_FAILURE, "Cannot init pmd\n");
-
- if (rte_eal_pci_probe() < 0)
- rte_exit(EXIT_FAILURE, "Cannot probe PCI\n");
-
nb_ports = rte_eth_dev_count();
if (nb_ports == 0)
rte_exit(EXIT_FAILURE, "No Ethernet ports - bye\n");
- if (nb_ports > RTE_MAX_ETHPORTS)
- nb_ports = RTE_MAX_ETHPORTS;
-
/*
* reserve memzone to communicate with VMs - we cannot use rte_malloc here
* because while it is technically possible, it is a very bad idea to share
/* init one RX queue */
fflush(stdout);
ret = rte_eth_rx_queue_setup(portid, 0, nb_rxd,
- rte_eth_dev_socket_id(portid), &rx_conf,
+ rte_eth_dev_socket_id(portid),
+ NULL,
l2fwd_ivshmem_pktmbuf_pool);
if (ret < 0)
rte_exit(EXIT_FAILURE, "rte_eth_rx_queue_setup:err=%d, port=%u\n",
/* init one TX queue on each port */
fflush(stdout);
ret = rte_eth_tx_queue_setup(portid, 0, nb_txd,
- rte_eth_dev_socket_id(portid), &tx_conf);
+ rte_eth_dev_socket_id(portid),
+ NULL);
if (ret < 0)
rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup:err=%d, port=%u\n",
ret, (unsigned) portid);
for (portid = 0; portid < nb_ports_available; portid++) {
/* RX ring. SP/SC because it's only used by host and a single VM */
- rte_snprintf(name, sizeof(name), "%s%i", RX_RING_PREFIX, portid);
+ snprintf(name, sizeof(name), "%s%i", RX_RING_PREFIX, portid);
r = rte_ring_create(name, NB_MBUF,
SOCKET_ID_ANY, RING_F_SP_ENQ | RING_F_SC_DEQ);
if (r == NULL)
ctrl->vm_ports[portid].rx_ring = r;
/* TX ring. SP/SC because it's only used by host and a single VM */
- rte_snprintf(name, sizeof(name), "%s%i", TX_RING_PREFIX, portid);
+ snprintf(name, sizeof(name), "%s%i", TX_RING_PREFIX, portid);
r = rte_ring_create(name, NB_MBUF,
SOCKET_ID_ANY, RING_F_SP_ENQ | RING_F_SC_DEQ);
if (r == NULL)