ethdev: allow event registration for all ports

[dpdk.git] / examples / l3fwd-power / main.c

diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c
index 0a34564..dd9e014 100644 (file)
--- a/examples/l3fwd-power/main.c
+++ b/examples/l3fwd-power/main.c
@@ -1,34 +1,5 @@
-/*-
- *   BSD LICENSE
- *
- *   Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
- *   All rights reserved.
- *
- *   Redistribution and use in source and binary forms, with or without
- *   modification, are permitted provided that the following conditions
- *   are met:
- *
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in
- *       the documentation and/or other materials provided with the
- *       distribution.
- *     * Neither the name of Intel Corporation nor the names of its
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2016 Intel Corporation
  */
 
 #include <stdio.h>
@@ -59,7 +30,6 @@
 #include <rte_per_lcore.h>
 #include <rte_branch_prediction.h>
 #include <rte_interrupts.h>
-#include <rte_pci.h>
 #include <rte_random.h>
 #include <rte_debug.h>
 #include <rte_ether.h>
@@ -80,8 +50,6 @@
 
 #define MIN_ZERO_POLL_COUNT 10
 
-/* around 100ms at 2 Ghz */
-#define TIMER_RESOLUTION_CYCLES           200000000ULL
 /* 100 ms interval */
 #define TIMER_NUMBER_PER_SECOND           10
 /* 100000 us */
@@ -232,7 +200,6 @@ static struct rte_eth_conf port_conf = {
                .mq_mode = ETH_MQ_TX_NONE,
        },
        .intr_conf = {
-               .lsc = 1,
                .rxq = 1,
        },
 };
@@ -758,6 +725,7 @@ power_freq_scaleup_heuristic(unsigned lcore_id,
                             uint16_t port_id,
                             uint16_t queue_id)
 {
+       uint32_t rxq_count = rte_eth_rx_queue_count(port_id, queue_id);
 /**
  * HW Rx queue size is 128 by default, Rx burst read at maximum 32 entries
  * per iteration
@@ -769,15 +737,12 @@ power_freq_scaleup_heuristic(unsigned lcore_id,
 #define FREQ_UP_TREND2_ACC   100
 #define FREQ_UP_THRESHOLD    10000
 
-       if (likely(rte_eth_rx_descriptor_done(port_id, queue_id,
-                       FREQ_GEAR3_RX_PACKET_THRESHOLD) > 0)) {
+       if (likely(rxq_count > FREQ_GEAR3_RX_PACKET_THRESHOLD)) {
                stats[lcore_id].trend = 0;
                return FREQ_HIGHEST;
-       } else if (likely(rte_eth_rx_descriptor_done(port_id, queue_id,
-                       FREQ_GEAR2_RX_PACKET_THRESHOLD) > 0))
+       } else if (likely(rxq_count > FREQ_GEAR2_RX_PACKET_THRESHOLD))
                stats[lcore_id].trend += FREQ_UP_TREND2_ACC;
-       else if (likely(rte_eth_rx_descriptor_done(port_id, queue_id,
-                       FREQ_GEAR1_RX_PACKET_THRESHOLD) > 0))
+       else if (likely(rxq_count > FREQ_GEAR1_RX_PACKET_THRESHOLD))
                stats[lcore_id].trend += FREQ_UP_TREND1_ACC;
 
        if (likely(stats[lcore_id].trend > FREQ_UP_THRESHOLD)) {
@@ -876,7 +841,7 @@ main_loop(__attribute__((unused)) void *dummy)
 {
        struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
        unsigned lcore_id;
-       uint64_t prev_tsc, diff_tsc, cur_tsc;
+       uint64_t prev_tsc, diff_tsc, cur_tsc, tim_res_tsc, hz;
        uint64_t prev_tsc_power = 0, cur_tsc_power, diff_tsc_power;
        int i, j, nb_rx;
        uint8_t queueid;
@@ -891,6 +856,8 @@ main_loop(__attribute__((unused)) void *dummy)
        const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
 
        prev_tsc = 0;
+       hz = rte_get_timer_hz();
+       tim_res_tsc = hz/TIMER_NUMBER_PER_SECOND;
 
        lcore_id = rte_lcore_id();
        qconf = &lcore_conf[lcore_id];
@@ -936,7 +903,7 @@ main_loop(__attribute__((unused)) void *dummy)
                }
 
                diff_tsc_power = cur_tsc_power - prev_tsc_power;
-               if (diff_tsc_power > TIMER_RESOLUTION_CYCLES) {
+               if (diff_tsc_power > tim_res_tsc) {
                        rte_timer_manage();
                        prev_tsc_power = cur_tsc_power;
                }
@@ -1052,9 +1019,11 @@ start_rx:
                                        turn_on_intr(qconf);
                                        sleep_until_rx_interrupt(
                                                qconf->n_rx_queue);
+                                       /**
+                                        * start receiving packets immediately
+                                        */
+                                       goto start_rx;
                                }
-                               /* start receiving packets immediately */
-                               goto start_rx;
                        }
                        stats[lcore_id].sleep_time += lcore_idle_hint;
                }