/*-
* BSD LICENSE
- *
- * Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
+ *
+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
* All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
* are met:
- *
- * * Redistributions of source code must retain the above copyright
+ *
+ * * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
* distribution.
- * * Neither the name of Intel Corporation nor the names of its
- * contributors may be used to endorse or promote products derived
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
*/
#include <stdio.h>
#include <rte_timer.h>
#include <rte_power.h>
-#include "main.h"
-
#define RTE_LOGTYPE_L3FWD_POWER RTE_LOGTYPE_USER1
#define MAX_PKT_BURST 32
nb_lcores*MEMPOOL_CACHE_SIZE), \
(unsigned)8192)
-/*
- * RX and TX Prefetch, Host, and Write-back threshold values should be
- * carefully set for optimal performance. Consult the network
- * controller's datasheet and supporting DPDK documentation for guidance
- * on how these parameters should be set.
- */
-#define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */
-#define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */
-#define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */
-
-/*
- * These default values are optimized for use with the Intel(R) 82599 10 GbE
- * Controller and the DPDK ixgbe PMD. Consider using other values for other
- * network controllers and/or network drivers.
- */
-#define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */
-#define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */
-#define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */
-
#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
#define NB_SOCKETS 8
static struct rte_eth_conf port_conf = {
.rxmode = {
+ .mq_mode = ETH_MQ_RX_RSS,
.max_rx_pkt_len = ETHER_MAX_LEN,
.split_hdr_size = 0,
.header_split = 0, /**< Header Split disabled */
.rx_adv_conf = {
.rss_conf = {
.rss_key = NULL,
- .rss_hf = ETH_RSS_IPV4 | ETH_RSS_IPV6,
+ .rss_hf = ETH_RSS_IP,
},
},
.txmode = {
},
};
-static const struct rte_eth_rxconf rx_conf = {
- .rx_thresh = {
- .pthresh = RX_PTHRESH,
- .hthresh = RX_HTHRESH,
- .wthresh = RX_WTHRESH,
- },
- .rx_free_thresh = 32,
-};
-
-static const struct rte_eth_txconf tx_conf = {
- .tx_thresh = {
- .pthresh = TX_PTHRESH,
- .hthresh = TX_HTHRESH,
- .wthresh = TX_WTHRESH,
- },
- .tx_free_thresh = 0, /* Use PMD default values */
- .tx_rs_thresh = 0, /* Use PMD default values */
- .txq_flags = 0x0,
-};
-
static struct rte_mempool * pktmbuf_pool[NB_SOCKETS];
uint64_t nb_rx_processed;
/* total iterations looped recently */
uint64_t nb_iteration_looped;
- uint32_t padding[9];
+ uint32_t padding[9];
} __rte_cache_aligned;
static struct lcore_conf lcore_conf[RTE_MAX_LCORE] __rte_cache_aligned;
static inline uint32_t power_idle_heuristic(uint32_t zero_rx_packet_count);
static inline enum freq_scale_hint_t power_freq_scaleup_heuristic( \
- unsigned lcore_id, uint32_t rx_ring_length);
+ unsigned lcore_id, uint8_t port_id, uint16_t queue_id);
/* exit signal handler */
static void
/* accumulate total execution time in us when callback is invoked */
sleep_time_ratio = (float)(stats[lcore_id].sleep_time) /
(float)SCALING_PERIOD;
-
+
/**
* check whether need to scale down frequency a step if it sleep a lot.
*/
#ifdef DO_RFC_1812_CHECKS
/* Check to make sure the packet is valid (RFC1812) */
- if (is_valid_ipv4_pkt(ipv4_hdr, m->pkt.pkt_len) < 0) {
+ if (is_valid_ipv4_pkt(ipv4_hdr, m->pkt_len) < 0) {
rte_pktmbuf_free(m);
return;
}
}
static inline enum freq_scale_hint_t
-power_freq_scaleup_heuristic(unsigned lcore_id, uint32_t rx_ring_length)
+power_freq_scaleup_heuristic(unsigned lcore_id,
+ uint8_t port_id,
+ uint16_t queue_id)
{
/**
* HW Rx queue size is 128 by default, Rx burst read at maximum 32 entries
* per iteration
*/
#define FREQ_GEAR1_RX_PACKET_THRESHOLD MAX_PKT_BURST
-#define FREQ_GEAR2_RX_PACKET_THRESHOLD 64
-#define FREQ_GEAR3_RX_PACKET_THRESHOLD 96
+#define FREQ_GEAR2_RX_PACKET_THRESHOLD (MAX_PKT_BURST*2)
+#define FREQ_GEAR3_RX_PACKET_THRESHOLD (MAX_PKT_BURST*3)
#define FREQ_UP_TREND1_ACC 1
#define FREQ_UP_TREND2_ACC 100
#define FREQ_UP_THRESHOLD 10000
- /**
- * there are received packets to process, staying at C0 state while
- * trying to scale up frequency depending on how many entries on h/w
- * queue. Determine frequency scaleup trend based on availiable entries
- * on Rx queues.
- */
- if (rx_ring_length > FREQ_GEAR3_RX_PACKET_THRESHOLD) {
+ if (likely(rte_eth_rx_descriptor_done(port_id, queue_id,
+ FREQ_GEAR3_RX_PACKET_THRESHOLD) > 0)) {
stats[lcore_id].trend = 0;
return FREQ_HIGHEST;
- } else if (rx_ring_length > FREQ_GEAR2_RX_PACKET_THRESHOLD)
+ } else if (likely(rte_eth_rx_descriptor_done(port_id, queue_id,
+ FREQ_GEAR2_RX_PACKET_THRESHOLD) > 0))
stats[lcore_id].trend += FREQ_UP_TREND2_ACC;
- else if (rx_ring_length > FREQ_GEAR1_RX_PACKET_THRESHOLD)
+ else if (likely(rte_eth_rx_descriptor_done(port_id, queue_id,
+ FREQ_GEAR1_RX_PACKET_THRESHOLD) > 0))
stats[lcore_id].trend += FREQ_UP_TREND1_ACC;
- if (stats[lcore_id].trend > FREQ_UP_THRESHOLD) {
+ if (likely(stats[lcore_id].trend > FREQ_UP_THRESHOLD)) {
stats[lcore_id].trend = 0;
return FREQ_HIGHER;
}
uint8_t portid, queueid;
struct lcore_conf *qconf;
struct lcore_rx_queue *rx_queue;
- uint32_t rx_ring_length;
enum freq_scale_hint_t lcore_scaleup_hint;
-
+
uint32_t lcore_rx_idle_count = 0;
uint32_t lcore_idle_hint = 0;
rx_queue->zero_rx_packet_count);
lcore_rx_idle_count++;
} else {
- /**
- * get availiable descriptor number via MMIO read is costly,
- * so only do it when recent poll returns maximum number.
- */
- if (nb_rx >= MAX_PKT_BURST)
- rx_ring_length = rte_eth_rx_queue_count(portid, queueid);
- else
- rx_ring_length = 0;
-
rx_queue->zero_rx_packet_count = 0;
/**
*/
rx_queue->freq_up_hint =
power_freq_scaleup_heuristic(lcore_id,
- rx_ring_length);
+ portid, queueid);
}
/* Prefetch first packets */
lcore_scaleup_hint)
lcore_scaleup_hint =
rx_queue->freq_up_hint;
- }
-
+ }
+
if (lcore_scaleup_hint == FREQ_HIGHEST)
rte_power_freq_max(lcore_id);
else if (lcore_scaleup_hint == FREQ_HIGHER)
if(size >= sizeof(s))
return -1;
- rte_snprintf(s, sizeof(s), "%.*s", size, p);
+ snprintf(s, sizeof(s), "%.*s", size, p);
if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') !=
_NUM_FLD)
return -1;
printf("numa is disabled \n");
numa_on = 0;
}
-
+
if (!strncmp(lgopts[option_index].name,
"enable-jumbo", 12)) {
struct option lenopts =
printf("jumbo frame is enabled \n");
port_conf.rxmode.jumbo_frame = 1;
-
+
/**
* if no max-pkt-len set, use the default value
* ETHER_MAX_LEN
"max packet length to %u\n",
(unsigned int)port_conf.rxmode.max_rx_pkt_len);
}
-
+
break;
default:
static void
print_ethaddr(const char *name, const struct ether_addr *eth_addr)
{
- printf ("%s%02X:%02X:%02X:%02X:%02X:%02X", name,
- eth_addr->addr_bytes[0],
- eth_addr->addr_bytes[1],
- eth_addr->addr_bytes[2],
- eth_addr->addr_bytes[3],
- eth_addr->addr_bytes[4],
- eth_addr->addr_bytes[5]);
+ char buf[ETHER_ADDR_FMT_SIZE];
+ ether_format_addr(buf, ETHER_ADDR_FMT_SIZE, eth_addr);
+ printf("%s%s", name, buf);
}
#if (APP_LOOKUP_METHOD == APP_LOOKUP_EXACT_MATCH)
char s[64];
/* create ipv4 hash */
- rte_snprintf(s, sizeof(s), "ipv4_l3fwd_hash_%d", socketid);
+ snprintf(s, sizeof(s), "ipv4_l3fwd_hash_%d", socketid);
ipv4_l3fwd_hash_params.name = s;
ipv4_l3fwd_hash_params.socket_id = socketid;
ipv4_l3fwd_lookup_struct[socketid] =
"socket %d\n", socketid);
/* create ipv6 hash */
- rte_snprintf(s, sizeof(s), "ipv6_l3fwd_hash_%d", socketid);
+ snprintf(s, sizeof(s), "ipv6_l3fwd_hash_%d", socketid);
ipv6_l3fwd_hash_params.name = s;
ipv6_l3fwd_hash_params.socket_id = socketid;
ipv6_l3fwd_lookup_struct[socketid] =
char s[64];
/* create the LPM table */
- rte_snprintf(s, sizeof(s), "IPV4_L3FWD_LPM_%d", socketid);
+ snprintf(s, sizeof(s), "IPV4_L3FWD_LPM_%d", socketid);
ipv4_l3fwd_lookup_struct[socketid] = rte_lpm_create(s, socketid,
IPV4_L3FWD_LPM_MAX_RULES, 0);
if (ipv4_l3fwd_lookup_struct[socketid] == NULL)
lcore_id, NB_SOCKETS);
}
if (pktmbuf_pool[socketid] == NULL) {
- rte_snprintf(s, sizeof(s), "mbuf_pool_%d", socketid);
+ snprintf(s, sizeof(s), "mbuf_pool_%d", socketid);
pktmbuf_pool[socketid] =
rte_mempool_create(s, nb_mbuf,
MBUF_SIZE, MEMPOOL_CACHE_SIZE,
}
int
-MAIN(int argc, char **argv)
+main(int argc, char **argv)
{
struct lcore_conf *qconf;
+ struct rte_eth_dev_info dev_info;
+ struct rte_eth_txconf *txconf;
int ret;
unsigned nb_ports;
uint16_t queueid;
rte_exit(EXIT_FAILURE, "init_lcore_rx_queues failed\n");
- /* init driver(s) */
- if (rte_pmd_init_all() < 0)
- rte_exit(EXIT_FAILURE, "Cannot init pmd\n");
-
- if (rte_eal_pci_probe() < 0)
- rte_exit(EXIT_FAILURE, "Cannot probe PCI\n");
-
nb_ports = rte_eth_dev_count();
if (nb_ports > RTE_MAX_ETHPORTS)
nb_ports = RTE_MAX_ETHPORTS;
printf("txq=%u,%d,%d ", lcore_id, queueid, socketid);
fflush(stdout);
+
+ rte_eth_dev_info_get(portid, &dev_info);
+ txconf = &dev_info.default_txconf;
+ if (port_conf.rxmode.jumbo_frame)
+ txconf->txq_flags = 0;
ret = rte_eth_tx_queue_setup(portid, queueid, nb_txd,
- socketid, &tx_conf);
+ socketid, txconf);
if (ret < 0)
rte_exit(EXIT_FAILURE,
"rte_eth_tx_queue_setup: err=%d, "
fflush(stdout);
ret = rte_eth_rx_queue_setup(portid, queueid, nb_rxd,
- socketid, &rx_conf, pktmbuf_pool[socketid]);
+ socketid, NULL,
+ pktmbuf_pool[socketid]);
if (ret < 0)
rte_exit(EXIT_FAILURE,
"rte_eth_rx_queue_setup: err=%d, "