__rte_experimental
uint16_t rte_dma_count_avail(void);
+/**
+ * Iterates over valid dmadev instances.
+ *
+ * @param start_dev_id
+ * The id of the next possible dmadev.
+ * @return
+ * Next valid dmadev, UINT16_MAX if there is none.
+ */
+__rte_experimental
+int16_t rte_dma_next_dev(int16_t start_dev_id);
+
+/** Utility macro to iterate over all available dmadevs */
+#define RTE_DMA_FOREACH_DEV(p) \
+ for (p = rte_dma_next_dev(0); \
+ p != -1; \
+ p = rte_dma_next_dev(p + 1))
+
+
/**@{@name DMA capability
* @see struct rte_dma_info::dev_capa
*/
* @see struct rte_dma_conf::silent_mode
*/
#define RTE_DMA_CAPA_SILENT RTE_BIT64(5)
+/** Supports error handling
+ *
+ * With this bit set, invalid input addresses will be reported as operation failures
+ * to the user but other operations can continue.
+ * Without this bit set, invalid data is not handled by either HW or driver, so user
+ * must ensure that all memory addresses are valid and accessible by HW.
+ */
+#define RTE_DMA_CAPA_HANDLES_ERRORS RTE_BIT64(6)
/** Support copy operation.
* This capability start with index of 32, so that it could leave gap between
* normal capability and ops capability.
#ifdef RTE_DMADEV_DEBUG
if (!rte_dma_is_valid(dev_id))
return 0;
- RTE_FUNC_PTR_OR_ERR_RET(*obbj->burst_capacity, 0);
+ RTE_FUNC_PTR_OR_ERR_RET(*obj->burst_capacity, 0);
#endif
return (*obj->burst_capacity)(obj->dev_private, vchan);
}