vdpa/ifc: add block device SW live-migration

[dpdk.git] / lib / hash / rte_hash_crc.h

diff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h
index 308fdde..0249ad1 100644 (file)
--- a/lib/hash/rte_hash_crc.h
+++ b/lib/hash/rte_hash_crc.h
@@ -16,10 +16,12 @@ extern "C" {
 #endif
 
 #include <stdint.h>
-#include <rte_config.h>
-#include <rte_cpuflags.h>
+
 #include <rte_branch_prediction.h>
 #include <rte_common.h>
+#include <rte_config.h>
+#include <rte_cpuflags.h>
+#include <rte_log.h>
 
 #include "rte_crc_sw.h"
 
@@ -33,41 +35,71 @@ static uint8_t crc32_alg = CRC32_SW;
 
 #if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
 #include "rte_crc_arm64.h"
-#else
+#elif defined(RTE_ARCH_X86)
 #include "rte_crc_x86.h"
+#else
+#include "rte_crc_generic.h"
+#endif
 
 /**
- * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash
+ * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash
  * calculation.
  *
  * @param alg
  *   An OR of following flags:
- *   - (CRC32_SW) Don't use SSE4.2 intrinsics
+ *   - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non-[x86/ARMv8])
  *   - (CRC32_SSE42) Use SSE4.2 intrinsics if available
- *   - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default)
+ *   - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default x86)
+ *   - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8)
  *
  */
 static inline void
 rte_hash_crc_set_alg(uint8_t alg)
 {
-#if defined(RTE_ARCH_X86)
-       if (alg == CRC32_SSE42_x64 &&
-                       !rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
-               alg = CRC32_SSE42;
+       crc32_alg = CRC32_SW;
+
+       if (alg == CRC32_SW)
+               return;
+
+#if defined RTE_ARCH_X86
+       if (!(alg & CRC32_SSE42_x64))
+               RTE_LOG(WARNING, HASH,
+                       "Unsupported CRC32 algorithm requested using CRC32_x64/CRC32_SSE42\n");
+       if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T) || alg == CRC32_SSE42)
+               crc32_alg = CRC32_SSE42;
+       else
+               crc32_alg = CRC32_SSE42_x64;
+#endif
+
+#if defined RTE_ARCH_ARM64
+       if (!(alg & CRC32_ARM64))
+               RTE_LOG(WARNING, HASH,
+                       "Unsupported CRC32 algorithm requested using CRC32_ARM64\n");
+       if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32))
+               crc32_alg = CRC32_ARM64;
 #endif
-       crc32_alg = alg;
+
+       if (crc32_alg == CRC32_SW)
+               RTE_LOG(WARNING, HASH,
+                       "Unsupported CRC32 algorithm requested using CRC32_SW\n");
 }
 
 /* Setting the best available algorithm */
 RTE_INIT(rte_hash_crc_init_alg)
 {
+#if defined(RTE_ARCH_X86)
        rte_hash_crc_set_alg(CRC32_SSE42_x64);
+#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
+       rte_hash_crc_set_alg(CRC32_ARM64);
+#else
+       rte_hash_crc_set_alg(CRC32_SW);
+#endif
 }
 
+#ifdef __DOXYGEN__
+
 /**
- * Use single crc32 instruction to perform a hash on a byte value.
- * Fall back to software crc32 implementation in case SSE4.2 is
- * not supported
+ * Use single CRC32 instruction to perform a hash on a byte value.
  *
  * @param data
  *   Data to perform hash on.
@@ -77,20 +109,10 @@ RTE_INIT(rte_hash_crc_init_alg)
  *   32bit calculated hash value.
  */
 static inline uint32_t
-rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
-{
-#if defined RTE_ARCH_X86
-       if (likely(crc32_alg & CRC32_SSE42))
-               return crc32c_sse42_u8(data, init_val);
-#endif
-
-       return crc32c_1byte(data, init_val);
-}
+rte_hash_crc_1byte(uint8_t data, uint32_t init_val);
 
 /**
- * Use single crc32 instruction to perform a hash on a 2 bytes value.
- * Fall back to software crc32 implementation in case SSE4.2 is
- * not supported
+ * Use single CRC32 instruction to perform a hash on a 2 bytes value.
  *
  * @param data
  *   Data to perform hash on.
@@ -100,20 +122,10 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
  *   32bit calculated hash value.
  */
 static inline uint32_t
-rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
-{
-#if defined RTE_ARCH_X86
-       if (likely(crc32_alg & CRC32_SSE42))
-               return crc32c_sse42_u16(data, init_val);
-#endif
-
-       return crc32c_2bytes(data, init_val);
-}
+rte_hash_crc_2byte(uint16_t data, uint32_t init_val);
 
 /**
- * Use single crc32 instruction to perform a hash on a 4 byte value.
- * Fall back to software crc32 implementation in case SSE4.2 is
- * not supported
+ * Use single CRC32 instruction to perform a hash on a 4 bytes value.
  *
  * @param data
  *   Data to perform hash on.
@@ -123,20 +135,10 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
  *   32bit calculated hash value.
  */
 static inline uint32_t
-rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
-{
-#if defined RTE_ARCH_X86
-       if (likely(crc32_alg & CRC32_SSE42))
-               return crc32c_sse42_u32(data, init_val);
-#endif
-
-       return crc32c_1word(data, init_val);
-}
+rte_hash_crc_4byte(uint32_t data, uint32_t init_val);
 
 /**
- * Use single crc32 instruction to perform a hash on a 8 byte value.
- * Fall back to software crc32 implementation in case SSE4.2 is
- * not supported
+ * Use single CRC32 instruction to perform a hash on a 8 bytes value.
  *
  * @param data
  *   Data to perform hash on.
@@ -146,22 +148,9 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
  *   32bit calculated hash value.
  */
 static inline uint32_t
-rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
-{
-#ifdef RTE_ARCH_X86_64
-       if (likely(crc32_alg == CRC32_SSE42_x64))
-               return crc32c_sse42_u64(data, init_val);
-#endif
-
-#if defined RTE_ARCH_X86
-       if (likely(crc32_alg & CRC32_SSE42))
-               return crc32c_sse42_u64_mimic(data, init_val);
-#endif
+rte_hash_crc_8byte(uint64_t data, uint32_t init_val);
 
-       return crc32c_2words(data, init_val);
-}
-
-#endif
+#endif /* __DOXYGEN__ */
 
 /**
  * Calculate CRC32 hash on user-supplied byte array.