#include <rte_launch.h>
#include <rte_memory.h>
#include <rte_memzone.h>
-#include <rte_tailq.h>
#include <rte_eal.h>
#include <rte_eal_memconfig.h>
#include <rte_per_lcore.h>
* enabling bus master.
*/
-struct uio_map {
+struct pci_map {
void *addr;
uint64_t offset;
uint64_t size;
* For multi-process we need to reproduce all PCI mappings in secondary
* processes, so save them in a tailq.
*/
-struct uio_resource {
- TAILQ_ENTRY(uio_resource) next;
+struct mapped_pci_resource {
+ TAILQ_ENTRY(mapped_pci_resource) next;
struct rte_pci_addr pci_addr;
char path[PATH_MAX];
size_t nb_maps;
- struct uio_map maps[PCI_MAX_RESOURCE];
+ struct pci_map maps[PCI_MAX_RESOURCE];
};
-TAILQ_HEAD(uio_res_list, uio_resource);
+TAILQ_HEAD(mapped_pci_res_list, mapped_pci_resource);
-static struct uio_res_list *uio_res_list = NULL;
+static struct rte_tailq_elem rte_uio_tailq = {
+ .name = "UIO_RESOURCE_LIST",
+};
+EAL_REGISTER_TAILQ(rte_uio_tailq)
/* unbind kernel driver for this device */
static int
return NULL;
}
-#ifndef OFF_MAX
-#define OFF_MAX ((uint64_t)(off_t)-1)
-#endif
-
static int
pci_uio_map_secondary(struct rte_pci_device *dev)
{
- size_t i;
- struct uio_resource *uio_res;
+ size_t i;
+ struct mapped_pci_resource *uio_res;
+ struct mapped_pci_res_list *uio_res_list =
+ RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);
TAILQ_FOREACH(uio_res, uio_res_list, next) {
!= uio_res->maps[i].addr) {
RTE_LOG(ERR, EAL,
"Cannot mmap device resource\n");
- return (-1);
+ return -1;
}
}
- return (0);
+ return 0;
}
RTE_LOG(ERR, EAL, "Cannot find resource for device\n");
- return -1;
+ return 1;
}
/* map the PCI resource of a PCI device in virtual memory */
uint64_t offset;
uint64_t pagesz;
struct rte_pci_addr *loc = &dev->addr;
- struct uio_resource *uio_res;
- struct uio_map *maps;
+ struct mapped_pci_resource *uio_res = NULL;
+ struct mapped_pci_res_list *uio_res_list =
+ RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list);
+ struct pci_map *maps;
dev->intr_handle.fd = -1;
dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
/* secondary processes - use already recorded details */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
- return (pci_uio_map_secondary(dev));
+ return pci_uio_map_secondary(dev);
- rte_snprintf(devname, sizeof(devname), "/dev/uio@pci:%u:%u:%u",
+ snprintf(devname, sizeof(devname), "/dev/uio@pci:%u:%u:%u",
dev->addr.bus, dev->addr.devid, dev->addr.function);
if (access(devname, O_RDWR) < 0) {
if (dev->intr_handle.fd < 0) {
RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
devname, strerror(errno));
- return -1;
+ goto error;
}
dev->intr_handle.type = RTE_INTR_HANDLE_UIO;
if ((uio_res = rte_zmalloc("UIO_RES", sizeof (*uio_res), 0)) == NULL) {
RTE_LOG(ERR, EAL,
"%s(): cannot store uio mmap details\n", __func__);
- return (-1);
+ goto error;
}
- rte_snprintf(uio_res->path, sizeof(uio_res->path), "%s", devname);
+ snprintf(uio_res->path, sizeof(uio_res->path), "%s", devname);
memcpy(&uio_res->pci_addr, &dev->addr, sizeof(uio_res->pci_addr));
(mapaddr = pci_map_resource(NULL, devname, (off_t)offset,
(size_t)maps[j].size)
) == NULL) {
- rte_free(uio_res);
- return (-1);
+ goto error;
}
maps[j].addr = mapaddr;
TAILQ_INSERT_TAIL(uio_res_list, uio_res, next);
- return (0);
-}
-
-/* parse the "resource" sysfs file */
-#define IORESOURCE_MEM 0x00000200
-
-/* Compare two PCI device addresses. */
-static int
-pci_addr_comparison(struct rte_pci_addr *addr, struct rte_pci_addr *addr2)
-{
- uint64_t dev_addr = (addr->domain << 24) + (addr->bus << 16) + (addr->devid << 8) + addr->function;
- uint64_t dev_addr2 = (addr2->domain << 24) + (addr2->bus << 16) + (addr2->devid << 8) + addr2->function;
+ return 0;
- if (dev_addr > dev_addr2)
- return 1;
- else
- return 0;
+error:
+ rte_free(uio_res);
+ if (dev->intr_handle.fd >= 0) {
+ close(dev->intr_handle.fd);
+ dev->intr_handle.fd = -1;
+ dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
+ }
+ return -1;
}
-
/* Scan one pci sysfs entry, and fill the devices list from it. */
static int
pci_scan_one(int dev_pci_fd, struct pci_conf *conf)
/* FreeBSD has no NUMA support (yet) */
dev->numa_node = 0;
-/* parse resources */
+ /* parse resources */
switch (conf->pc_hdr & PCIM_HDRTYPE) {
case PCIM_HDRTYPE_NORMAL:
max = PCIR_MAX_BAR_0;
}
else {
struct rte_pci_device *dev2 = NULL;
+ int ret;
TAILQ_FOREACH(dev2, &pci_device_list, next) {
- if (pci_addr_comparison(&dev->addr, &dev2->addr))
+ ret = rte_eal_compare_pci_addr(&dev->addr, &dev2->addr);
+ if (ret > 0)
continue;
- else {
+ else if (ret < 0) {
TAILQ_INSERT_BEFORE(dev2, dev, next);
return 0;
+ } else { /* already registered */
+ dev2->kdrv = dev->kdrv;
+ dev2->max_vfs = dev->max_vfs;
+ memmove(dev2->mem_resource,
+ dev->mem_resource,
+ sizeof(dev->mem_resource));
+ free(dev);
+ return 0;
}
}
TAILQ_INSERT_TAIL(&pci_device_list, dev, next);
static int
pci_scan(void)
{
- int fd = -1;
+ int fd;
unsigned dev_count = 0;
struct pci_conf matches[16];
struct pci_conf_io conf_io = {
int
rte_eal_pci_probe_one_driver(struct rte_pci_driver *dr, struct rte_pci_device *dev)
{
- struct rte_pci_id *id_table;
+ const struct rte_pci_id *id_table;
int ret;
for (id_table = dr->id_table ; id_table->vendor_id != 0; id_table++) {
return 0;
}
- if (dr->drv_flags & RTE_PCI_DRV_NEED_IGB_UIO) {
+ if (dr->drv_flags & RTE_PCI_DRV_NEED_MAPPING) {
/* map resources for devices that use igb_uio */
ret = pci_uio_map_resource(dev);
if (ret != 0)
{
TAILQ_INIT(&pci_driver_list);
TAILQ_INIT(&pci_device_list);
- uio_res_list = RTE_TAILQ_RESERVE_BY_IDX(RTE_TAILQ_PCI, uio_res_list);
/* for debug purposes, PCI can be disabled */
if (internal_config.no_pci)
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