config: clean cache line size selection scheme

[dpdk.git] / lib / librte_eal / common / include / rte_memory.h

diff --git a/lib/librte_eal/common/include/rte_memory.h b/lib/librte_eal/common/include/rte_memory.h
index 7f21244..2200d58 100644 (file)
--- a/lib/librte_eal/common/include/rte_memory.h
+++ b/lib/librte_eal/common/include/rte_memory.h
@@ -42,6 +42,7 @@
 
 #include <stdint.h>
 #include <stddef.h>
+#include <stdio.h>
 
 #ifdef RTE_EXEC_ENV_LINUXAPP
 #include <exec-env/rte_dom0_common.h>
@@ -51,26 +52,32 @@
 extern "C" {
 #endif
 
+#include <rte_common.h>
+
 enum rte_page_sizes {
-       RTE_PGSIZE_4K = 1 << 12,
-       RTE_PGSIZE_2M = RTE_PGSIZE_4K << 9,
-       RTE_PGSIZE_1G = RTE_PGSIZE_2M <<9
+       RTE_PGSIZE_4K    = 1ULL << 12,
+       RTE_PGSIZE_64K   = 1ULL << 16,
+       RTE_PGSIZE_256K  = 1ULL << 18,
+       RTE_PGSIZE_2M    = 1ULL << 21,
+       RTE_PGSIZE_16M   = 1ULL << 24,
+       RTE_PGSIZE_256M  = 1ULL << 28,
+       RTE_PGSIZE_512M  = 1ULL << 29,
+       RTE_PGSIZE_1G    = 1ULL << 30,
+       RTE_PGSIZE_4G    = 1ULL << 32,
+       RTE_PGSIZE_16G   = 1ULL << 34,
 };
 
 #define SOCKET_ID_ANY -1                    /**< Any NUMA socket. */
-#ifndef CACHE_LINE_SIZE
-#define CACHE_LINE_SIZE 64                  /**< Cache line size. */
-#endif
-#define CACHE_LINE_MASK (CACHE_LINE_SIZE-1) /**< Cache line mask. */
+#define RTE_CACHE_LINE_MASK (RTE_CACHE_LINE_SIZE-1) /**< Cache line mask. */
 
-#define CACHE_LINE_ROUNDUP(size) \
-       (CACHE_LINE_SIZE * ((size + CACHE_LINE_SIZE - 1) / CACHE_LINE_SIZE))
+#define RTE_CACHE_LINE_ROUNDUP(size) \
+       (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE))
 /**< Return the first cache-aligned value greater or equal to size. */
 
 /**
  * Force alignment to cache line.
  */
-#define __rte_cache_aligned __attribute__((__aligned__(CACHE_LINE_SIZE)))
+#define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
 
 typedef uint64_t phys_addr_t; /**< Physical address definition. */
 #define RTE_BAD_PHYS_ADDR ((phys_addr_t)-1)
@@ -88,7 +95,7 @@ struct rte_memseg {
        phys_addr_t ioremap_addr; /**< Real physical address inside the VM */
 #endif
        size_t len;               /**< Length of the segment. */
-       size_t hugepage_sz;       /**< The pagesize of underlying memory */
+       uint64_t hugepage_sz;       /**< The pagesize of underlying memory */
        int32_t socket_id;          /**< NUMA socket ID. */
        uint32_t nchannel;          /**< Number of channels. */
        uint32_t nrank;             /**< Number of ranks. */
@@ -96,7 +103,7 @@ struct rte_memseg {
         /**< store segment MFNs */
        uint64_t mfn[DOM0_NUM_MEMBLOCK];
 #endif
-} __attribute__((__packed__));
+} __rte_packed;
 
 /**
  * Lock page in physical memory and prevent from swapping.
@@ -172,6 +179,13 @@ unsigned rte_memory_get_nchannel(void);
 unsigned rte_memory_get_nrank(void);
 
 #ifdef RTE_LIBRTE_XEN_DOM0
+
+/**< Internal use only - should DOM0 memory mapping be used */
+int rte_xen_dom0_supported(void);
+
+/**< Internal use only - phys to virt mapping for xen */
+phys_addr_t rte_xen_mem_phy2mch(uint32_t, const phys_addr_t);
+
 /**
  * Return the physical address of elt, which is an element of the pool mp.
  *
@@ -183,7 +197,14 @@ unsigned rte_memory_get_nrank(void);
  * @return
  *   The physical address or error.
  */
-phys_addr_t rte_mem_phy2mch(uint32_t memseg_id, const phys_addr_t phy_addr);
+static inline phys_addr_t
+rte_mem_phy2mch(uint32_t memseg_id, const phys_addr_t phy_addr)
+{
+       if (rte_xen_dom0_supported())
+               return rte_xen_mem_phy2mch(memseg_id, phy_addr);
+       else
+               return phy_addr;
+}
 
 /**
  * Memory init for supporting application running on Xen domain0.
@@ -192,7 +213,7 @@ phys_addr_t rte_mem_phy2mch(uint32_t memseg_id, const phys_addr_t phy_addr);
  *
  * @return
  *       0: successfully
- *      negative: error
+ *      negative: error
  */
 int rte_xen_dom0_memory_init(void);
 
@@ -206,7 +227,19 @@ int rte_xen_dom0_memory_init(void);
  *       negative: error
  */
 int rte_xen_dom0_memory_attach(void);
+#else
+static inline int rte_xen_dom0_supported(void)
+{
+       return 0;
+}
+
+static inline phys_addr_t
+rte_mem_phy2mch(uint32_t memseg_id __rte_unused, const phys_addr_t phy_addr)
+{
+       return phy_addr;
+}
 #endif
+
 #ifdef __cplusplus
 }
 #endif