};
#define SOCKET_ID_ANY -1 /**< Any NUMA socket. */
-#define RTE_CACHE_LINE_MASK (RTE_CACHE_LINE_SIZE-1) /**< Cache line mask. */
-
-#define RTE_CACHE_LINE_ROUNDUP(size) \
- (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE))
-/**< Return the first cache-aligned value greater or equal to size. */
-
-/**< Cache line size in terms of log2 */
-#if RTE_CACHE_LINE_SIZE == 64
-#define RTE_CACHE_LINE_SIZE_LOG2 6
-#elif RTE_CACHE_LINE_SIZE == 128
-#define RTE_CACHE_LINE_SIZE_LOG2 7
-#else
-#error "Unsupported cache line size"
-#endif
-
-#define RTE_CACHE_LINE_MIN_SIZE 64 /**< Minimum Cache line size. */
-
-/**
- * Force alignment to cache line.
- */
-#define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
-
-/**
- * Force minimum cache line alignment.
- */
-#define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
-
-typedef uint64_t phys_addr_t; /**< Physical address. */
-#define RTE_BAD_PHYS_ADDR ((phys_addr_t)-1)
-/**
- * IO virtual address type.
- * When the physical addressing mode (IOVA as PA) is in use,
- * the translation from an IO virtual address (IOVA) to a physical address
- * is a direct mapping, i.e. the same value.
- * Otherwise, in virtual mode (IOVA as VA), an IOMMU may do the translation.
- */
-typedef uint64_t rte_iova_t;
-#define RTE_BAD_IOVA ((rte_iova_t)-1)
/**
* Physical memory segment descriptor.
volatile uint32_t version; /**< version number for multiprocess sync. */
size_t len; /**< Length of memory area covered by this memseg list. */
unsigned int external; /**< 1 if this list points to external memory */
+ unsigned int heap; /**< 1 if this list points to a heap */
struct rte_fbarray memseg_arr;
};