timer: get TSC frequency from /proc/cpuinfo
[dpdk.git] / lib / librte_eal / linuxapp / eal / eal_timer.c
index b8fbaf1..1d10457 100644 (file)
@@ -1,7 +1,8 @@
 /*-
  *   BSD LICENSE
  * 
- *   Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ *   Copyright(c) 2012-2013 6WIND S.A.
  *   All rights reserved.
  * 
  *   Redistribution and use in source and binary forms, with or without
@@ -242,6 +243,70 @@ rte_eal_hpet_init(int make_default)
 }
 #endif
 
+static void
+check_tsc_flags(void)
+{
+       char line[512];
+       FILE *stream;
+
+       stream = fopen("/proc/cpuinfo", "r");
+       if (!stream) {
+               RTE_LOG(WARNING, EAL, "WARNING: Unable to open /proc/cpuinfo\n");
+               return;
+       }
+
+       while (fgets(line, sizeof line, stream)) {
+               char *constant_tsc;
+               char *nonstop_tsc;
+
+               if (strncmp(line, "flags", 5) != 0)
+                       continue;
+
+               constant_tsc = strstr(line, "constant_tsc");
+               nonstop_tsc = strstr(line, "nonstop_tsc");
+               if (!constant_tsc || !nonstop_tsc)
+                       RTE_LOG(WARNING, EAL,
+                               "WARNING: cpu flags "
+                               "constant_tsc=%s "
+                               "nonstop_tsc=%s "
+                               "-> using unreliable clock cycles !\n",
+                               constant_tsc ? "yes":"no",
+                               nonstop_tsc ? "yes":"no");
+               break;
+       }
+
+       fclose(stream);
+}
+
+static int
+set_tsc_freq_from_cpuinfo(void)
+{
+       char line[256];
+       FILE *stream;
+       double dmhz;
+
+       stream = fopen("/proc/cpuinfo", "r");
+       if (!stream) {
+               RTE_LOG(WARNING, EAL, "WARNING: Unable to open /proc/cpuinfo\n");
+               return -1;
+       }
+
+       while (fgets(line, sizeof line, stream)) {
+               if (sscanf(line, "cpu MHz\t: %lf", &dmhz) == 1) {
+                       eal_tsc_resolution_hz = (uint64_t)(dmhz * 1000000UL);
+                       break;
+               }
+       }
+
+       fclose(stream);
+
+       if (!eal_tsc_resolution_hz) {
+               RTE_LOG(WARNING, EAL, "WARNING: Cannot read CPU clock from cpuinfo\n");
+               return -1;
+       }
+       return 0;
+}
+
 static int
 set_tsc_freq_from_clock(void)
 {
@@ -290,8 +355,9 @@ set_tsc_freq_fallback(void)
 static void
 set_tsc_freq(void)
 {
-       if (set_tsc_freq_from_clock() < 0)
-               set_tsc_freq_fallback();
+       if (set_tsc_freq_from_cpuinfo() < 0 &&
+           set_tsc_freq_from_clock() < 0)
+           set_tsc_freq_fallback();
 
        RTE_LOG(INFO, EAL, "TSC frequency is ~%"PRIu64" KHz\n",
                        eal_tsc_resolution_hz/1000);
@@ -304,5 +370,6 @@ rte_eal_timer_init(void)
        eal_timer_source = EAL_TIMER_TSC;
 
        set_tsc_freq();
+       check_tsc_flags();
        return 0;
 }