#include <linux/io.h>
#include <linux/msi.h>
#include <linux/version.h>
+#include <linux/slab.h>
#ifdef CONFIG_XEN_DOM0
#include <xen/xen.h>
#endif
#include <rte_pci_dev_features.h>
+#include "compat.h"
+
#ifdef RTE_PCI_CONFIG
#define PCI_SYS_FILE_BUF_SIZE 10
#define PCI_DEV_CAP_REG 0xA4
}
/* sriov sysfs */
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 34)
-static int pci_num_vf(struct pci_dev *dev)
- struct iov {
- int pos;
- int nres;
- u32 cap;
- u16 ctrl;
- u16 total;
- u16 initial;
- u16 nr_virtfn;
- } *iov = (struct iov *)dev->sriov;
-
- if (!dev->is_physfn)
- return 0;
-
- return iov->nr_virtfn;
-}
-#endif
-
static ssize_t
show_max_vfs(struct device *dev, struct device_attribute *attr,
char *buf)
unsigned long max_vfs;
struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
- if (0 != strict_strtoul(buf, 0, &max_vfs))
+ if (0 != kstrtoul(buf, 0, &max_vfs))
return -EINVAL;
if (0 == max_vfs)
unsigned long size = 0;
int ret;
- if (strict_strtoul(buf, 0, &size) != 0)
+ if (0 != kstrtoul(buf, 0, &size))
return -EINVAL;
ret = pcie_set_readrq(pci_dev, (int)size);
static const struct attribute_group dev_attr_grp = {
.attrs = dev_attrs,
};
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0)
-/* Check if INTX works to control irq's.
- * Set's INTX_DISABLE flag and reads it back
- */
-static bool pci_intx_mask_supported(struct pci_dev *dev)
-{
- bool mask_supported = false;
- uint16_t orig, new
-
- pci_block_user_cfg_access(dev);
- pci_read_config_word(pdev, PCI_COMMAND, &orig);
- pci_write_config_word(dev, PCI_COMMAND,
- orig ^ PCI_COMMAND_INTX_DISABLE);
- pci_read_config_word(dev, PCI_COMMAND, &new);
-
- if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) {
- dev_err(&dev->dev, "Command register changed from "
- "0x%x to 0x%x: driver or hardware bug?\n", orig, new);
- } else if ((new ^ orig) & PCI_COMMAND_INTX_DISABLE) {
- mask_supported = true;
- pci_write_config_word(dev, PCI_COMMAND, orig);
- }
- pci_unblock_user_cfg_access(dev);
-}
-
-static bool pci_check_and_mask_intx(struct pci_dev *pdev)
-{
- bool pending;
- uint32_t status;
-
- pci_block_user_cfg_access(dev);
- pci_read_config_dword(pdev, PCI_COMMAND, &status);
-
- /* interrupt is not ours, goes to out */
- pending = (((status >> 16) & PCI_STATUS_INTERRUPT) != 0);
- if (pending) {
- uint16_t old, new;
-
- old = status;
- if (state != 0)
- new = old & (~PCI_COMMAND_INTX_DISABLE);
- else
- new = old | PCI_COMMAND_INTX_DISABLE;
-
- if (old != new)
- pci_write_config_word(pdev, PCI_COMMAND, new);
- }
- pci_unblock_user_cfg_access(dev);
-
- return pending;
-}
-#endif
-
/*
* It masks the msix on/off of generating MSI-X messages.
*/
idx = (int)vma->vm_pgoff;
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+#ifdef HAVE_PTE_MASK_PAGE_IOMAP
vma->vm_page_prot.pgprot |= _PAGE_IOMAP;
+#endif
return remap_pfn_range(vma,
vma->vm_start,
udev->info.version = "0.1";
udev->info.handler = igbuio_pci_irqhandler;
udev->info.irqcontrol = igbuio_pci_irqcontrol;
- udev->info.irq = dev->irq;
#ifdef CONFIG_XEN_DOM0
/* check if the driver run on Xen Dom0 */
if (xen_initial_domain())
udev->pdev = dev;
switch (igbuio_intr_mode_preferred) {
- case RTE_INTR_MODE_NONE:
- udev->info.irq = 0;
- break;
case RTE_INTR_MODE_MSIX:
/* Only 1 msi-x vector needed */
msix_entry.entry = 0;
if (pci_intx_mask_supported(dev)) {
dev_dbg(&dev->dev, "using INTX");
udev->info.irq_flags = IRQF_SHARED;
+ udev->info.irq = dev->irq;
udev->mode = RTE_INTR_MODE_LEGACY;
- } else {
- dev_err(&dev->dev, "PCI INTX mask not supported\n");
- err = -EIO;
- goto fail_release_iomem;
+ break;
}
+ dev_notice(&dev->dev, "PCI INTX mask not supported\n");
+ /* fall back to no IRQ */
+ case RTE_INTR_MODE_NONE:
+ udev->mode = RTE_INTR_MODE_NONE;
+ udev->info.irq = 0;
break;
+
default:
dev_err(&dev->dev, "invalid IRQ mode %u",
igbuio_intr_mode_preferred);