#define rte_io_rmb() rte_compiler_barrier()
-#define rte_cio_wmb() rte_compiler_barrier()
-
-#define rte_cio_rmb() rte_compiler_barrier()
+/**
+ * Synchronization fence between threads based on the specified memory order.
+ *
+ * On x86 the __atomic_thread_fence(__ATOMIC_SEQ_CST) generates full 'mfence'
+ * which is quite expensive. The optimized implementation of rte_smp_mb is
+ * used instead.
+ */
+static __rte_always_inline void
+rte_atomic_thread_fence(int memorder)
+{
+ if (memorder == __ATOMIC_SEQ_CST)
+ rte_smp_mb();
+ else
+ __atomic_thread_fence(memorder);
+}
/*------------------------- 16 bit atomic operations -------------------------*/