rte_eth_dev_bypass_ver_show;
rte_eth_dev_bypass_wd_reset;
rte_eth_dev_bypass_wd_timeout_show;
- rte_eth_dev_callback_process;
rte_eth_dev_callback_register;
rte_eth_dev_callback_unregister;
rte_eth_dev_close;
rte_eth_dev_get_eeprom_length;
rte_eth_dev_get_mtu;
rte_eth_dev_get_reg_info;
- rte_eth_dev_get_reg_length;
rte_eth_dev_get_vlan_offload;
rte_eth_devices;
rte_eth_dev_info_get;
rte_eth_dev_set_mtu;
rte_eth_dev_set_rx_queue_stats_mapping;
rte_eth_dev_set_tx_queue_stats_mapping;
- rte_eth_dev_set_vf_rx;
- rte_eth_dev_set_vf_rxmode;
- rte_eth_dev_set_vf_tx;
- rte_eth_dev_set_vf_vlan_filter;
- rte_eth_dev_set_vlan_ether_type;
rte_eth_dev_set_vlan_offload;
rte_eth_dev_set_vlan_pvid;
rte_eth_dev_set_vlan_strip_on_queue;
rte_eth_dev_vlan_filter;
rte_eth_dev_wd_timeout_store;
rte_eth_dma_zone_reserve;
- rte_eth_driver_register;
rte_eth_led_off;
rte_eth_led_on;
rte_eth_link;
rte_eth_rx_queue_info_get;
rte_eth_rx_queue_setup;
rte_eth_set_queue_rate_limit;
- rte_eth_set_vf_rate_limit;
rte_eth_stats;
rte_eth_stats_get;
rte_eth_stats_reset;
global:
rte_eth_add_first_rx_callback;
+ rte_eth_dev_get_name_by_port;
+ rte_eth_dev_get_port_by_name;
rte_eth_xstats_get_names;
+
} DPDK_16.04;
+
+DPDK_16.11 {
+ global:
+
+ rte_eth_dev_pci_probe;
+ rte_eth_dev_pci_remove;
+
+} DPDK_16.07;
+
+DPDK_17.02 {
+ global:
+
+ _rte_eth_dev_reset;
+ rte_eth_dev_fw_version_get;
+ rte_flow_create;
+ rte_flow_destroy;
+ rte_flow_flush;
+ rte_flow_query;
+ rte_flow_validate;
+
+} DPDK_16.11;