i40e: fix offloading of outer checksum for IPIP tunnel

[dpdk.git] / lib / librte_pmd_e1000 / e1000 / e1000_manage.c

diff --git a/lib/librte_pmd_e1000/e1000/e1000_manage.c b/lib/librte_pmd_e1000/e1000/e1000_manage.c
index f7d6c26..30db892 100644 (file)
--- a/lib/librte_pmd_e1000/e1000/e1000_manage.c
+++ b/lib/librte_pmd_e1000/e1000/e1000_manage.c
@@ -1,6 +1,6 @@
 /*******************************************************************************
 
-Copyright (c) 2001-2012, Intel Corporation
+Copyright (c) 2001-2014, Intel Corporation
 All rights reserved.
 
 Redistribution and use in source and binary forms, with or without
@@ -116,7 +116,7 @@ bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
 
 
        return (fwsm & E1000_FWSM_MODE_MASK) ==
-               (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
+               (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
 }
 
 /**
@@ -144,11 +144,10 @@ bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
                return hw->mac.tx_pkt_filtering;
        }
 
-       /*
-        * If we can't read from the host interface for whatever
+       /* If we can't read from the host interface for whatever
         * reason, disable filtering.
         */
-       ret_val = hw->mac.ops.mng_enable_host_if(hw);
+       ret_val = e1000_mng_enable_host_if_generic(hw);
        if (ret_val != E1000_SUCCESS) {
                hw->mac.tx_pkt_filtering = false;
                return hw->mac.tx_pkt_filtering;
@@ -159,13 +158,12 @@ bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
        offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
        for (i = 0; i < len; i++)
                *(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF,
-                                                          offset + i);
+                                                          offset + i);
        hdr_csum = hdr->checksum;
        hdr->checksum = 0;
        csum = e1000_calculate_checksum((u8 *)hdr,
-                                       E1000_MNG_DHCP_COOKIE_LENGTH);
-       /*
-        * If either the checksums or signature don't match, then
+                                       E1000_MNG_DHCP_COOKIE_LENGTH);
+       /* If either the checksums or signature don't match, then
         * the cookie area isn't considered valid, in which case we
         * take the safe route of assuming Tx filtering is enabled.
         */
@@ -189,7 +187,7 @@ bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
  *  Writes the command header after does the checksum calculation.
  **/
 s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
-                                    struct e1000_host_mng_command_header *hdr)
+                                     struct e1000_host_mng_command_header *hdr)
 {
        u16 i, length = sizeof(struct e1000_host_mng_command_header);
 
@@ -203,7 +201,7 @@ s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
        /* Write the relevant command block into the ram area. */
        for (i = 0; i < length; i++) {
                E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
-                                           *((u32 *) hdr + i));
+                                           *((u32 *) hdr + i));
                E1000_WRITE_FLUSH(hw);
        }
 
@@ -223,7 +221,7 @@ s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
  *  way.  Also fills up the sum of the buffer in *buffer parameter.
  **/
 s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
-                                    u16 length, u16 offset, u8 *sum)
+                                   u16 length, u16 offset, u8 *sum)
 {
        u8 *tmp;
        u8 *bufptr = buffer;
@@ -258,8 +256,7 @@ s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
        /* Calculate length in DWORDs */
        length >>= 2;
 
-       /*
-        * The device driver writes the relevant command block into the
+       /* The device driver writes the relevant command block into the
         * ram area.
         */
        for (i = 0; i < length; i++) {
@@ -269,7 +266,7 @@ s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
                }
 
                E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
-                                           data);
+                                           data);
        }
        if (remaining) {
                for (j = 0; j < sizeof(u32); j++) {
@@ -311,18 +308,18 @@ s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, u8 *buffer,
        hdr.checksum = 0;
 
        /* Enable the host interface */
-       ret_val = hw->mac.ops.mng_enable_host_if(hw);
+       ret_val = e1000_mng_enable_host_if_generic(hw);
        if (ret_val)
                return ret_val;
 
        /* Populate the host interface with the contents of "buffer". */
-       ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
-                                               sizeof(hdr), &(hdr.checksum));
+       ret_val = e1000_mng_host_if_write_generic(hw, buffer, length,
+                                                 sizeof(hdr), &(hdr.checksum));
        if (ret_val)
-       return ret_val;
+               return ret_val;
 
        /* Write the manageability command header */
-       ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
+       ret_val = e1000_mng_write_cmd_header_generic(hw, &hdr);
        if (ret_val)
                return ret_val;
 
@@ -375,8 +372,8 @@ bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
                     (e1000_mng_mode_pt << 13)))
                        return true;
        } else if ((manc & E1000_MANC_SMBUS_EN) &&
-                   !(manc & E1000_MANC_ASF_EN)) {
-                       return true;
+                  !(manc & E1000_MANC_ASF_EN)) {
+               return true;
        }
 
        return false;
@@ -423,13 +420,12 @@ s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length)
        /* Calculate length in DWORDs */
        length >>= 2;
 
-       /*
-        * The device driver writes the relevant command block
+       /* The device driver writes the relevant command block
         * into the ram area.
         */
        for (i = 0; i < length; i++)
                E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
-                                           *((u32 *)buffer + i));
+                                           *((u32 *)buffer + i));
 
        /* Setting this bit tells the ARC that a new command is pending. */
        E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
@@ -450,8 +446,8 @@ s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length)
 
        for (i = 0; i < length; i++)
                *((u32 *)buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,
-                                                                 E1000_HOST_IF,
-                                                                 i);
+                                                                 E1000_HOST_IF,
+                                                                 i);
 
        return E1000_SUCCESS;
 }
@@ -536,8 +532,7 @@ s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length)
        /* Calculate length in DWORDs */
        length >>= 2;
 
-       /*
-        * The device driver writes the relevant FW code block
+       /* The device driver writes the relevant FW code block
         * into the ram area in DWORDs via 1kB ram addressing window.
         */
        for (i = 0; i < length; i++) {