i40e/base: grab NVM devstarter version instead of image version

[dpdk.git] / lib / librte_pmd_i40e / i40e_ethdev.c

diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c
index 6b8f96e..96700e4 100644 (file)
--- a/lib/librte_pmd_i40e/i40e_ethdev.c
+++ b/lib/librte_pmd_i40e/i40e_ethdev.c
@@ -1,7 +1,7 @@
 /*-
  *   BSD LICENSE
  *
- *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
  *   All rights reserved.
  *
  *   Redistribution and use in source and binary forms, with or without
@@ -212,13 +212,13 @@ static int i40e_dev_filter_ctrl(struct rte_eth_dev *dev,
 static void i40e_configure_registers(struct i40e_hw *hw);
 static void i40e_hw_init(struct i40e_hw *hw);
 
-static struct rte_pci_id pci_id_i40e_map[] = {
+static const struct rte_pci_id pci_id_i40e_map[] = {
 #define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
 #include "rte_pci_dev_ids.h"
 { .vendor_id = 0, /* sentinel */ },
 };
 
-static struct eth_dev_ops i40e_eth_dev_ops = {
+static const struct eth_dev_ops i40e_eth_dev_ops = {
        .dev_configure                = i40e_dev_configure,
        .dev_start                    = i40e_dev_start,
        .dev_stop                     = i40e_dev_stop,
@@ -791,6 +791,10 @@ i40e_phy_conf_link(struct i40e_hw *hw, uint8_t abilities, uint8_t force_speed)
                        I40E_LINK_SPEED_100MB;
        int ret = -ENOTSUP;
 
+       /* Skip it on 40G interfaces, as a workaround for the link issue */
+       if (i40e_is_40G_device(hw->device_id))
+               return I40E_SUCCESS;
+
        status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_ab,
                                              NULL);
        if (status)
@@ -1265,9 +1269,6 @@ i40e_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
                            I40E_GLPRT_BPTCL(hw->port),
                            pf->offset_loaded, &os->eth.tx_broadcast,
                            &ns->eth.tx_broadcast);
-       i40e_stat_update_32(hw, I40E_GLPRT_TDPC(hw->port),
-                           pf->offset_loaded, &os->eth.tx_discards,
-                           &ns->eth.tx_discards);
        /* GLPRT_TEPC not supported */
 
        /* additional port specific stats */
@@ -5622,25 +5623,6 @@ i40e_pctype_to_flowtype(enum i40e_filter_pctype pctype)
        return flowtype_table[pctype];
 }
 
-static int
-i40e_debug_read_register(struct i40e_hw *hw, uint32_t addr, uint64_t *val)
-{
-       struct i40e_aq_desc desc;
-       enum i40e_status_code status;
-
-       i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_debug_read_reg);
-       desc.params.internal.param1 = rte_cpu_to_le_32(addr);
-       status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
-       if (status < 0)
-               return status;
-
-       *val = ((uint64_t)(rte_le_to_cpu_32(desc.params.internal.param2)) <<
-                                       (CHAR_BIT * sizeof(uint32_t))) +
-                               rte_le_to_cpu_32(desc.params.internal.param3);
-
-       return status;
-}
-
 /*
  * On X710, performance number is far from the expectation on recent firmware
  * versions; on XL710, performance number is also far from the expectation on
@@ -5691,7 +5673,8 @@ i40e_configure_registers(struct i40e_hw *hw)
                                        I40E_GL_SWR_PM_UP_THR_EF_VALUE;
                }
 
-               ret = i40e_debug_read_register(hw, reg_table[i].addr, &reg);
+               ret = i40e_aq_debug_read_register(hw, reg_table[i].addr,
+                                                       &reg, NULL);
                if (ret < 0) {
                        PMD_DRV_LOG(ERR, "Failed to read from 0x%"PRIx32,
                                                        reg_table[i].addr);