hash: fallback to software CRC32 implementation

[dpdk.git] / lib / librte_pmd_i40e / i40e_rxtx.c

diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c
index 2beae3c..12c0831 100644 (file)
--- a/lib/librte_pmd_i40e/i40e_rxtx.c
+++ b/lib/librte_pmd_i40e/i40e_rxtx.c
@@ -74,6 +74,11 @@
 
 #define I40E_TXD_CMD (I40E_TX_DESC_CMD_EOP | I40E_TX_DESC_CMD_RS)
 
+#define I40E_TX_CKSUM_OFFLOAD_MASK (            \
+               PKT_TX_IP_CKSUM |                \
+               PKT_TX_L4_MASK |                 \
+               PKT_TX_OUTER_IP_CKSUM)
+
 #define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \
        (uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM)
 
@@ -466,18 +471,8 @@ i40e_txd_enable_checksum(uint64_t ol_flags,
                        uint16_t outer_l3_len,
                        uint32_t *cd_tunneling)
 {
-       if (!l2_len) {
-               PMD_DRV_LOG(DEBUG, "L2 length set to 0");
-               return;
-       }
-
-       if (!l3_len) {
-               PMD_DRV_LOG(DEBUG, "L3 length set to 0");
-               return;
-       }
-
        /* UDP tunneling packet TX checksum offload */
-       if (unlikely(ol_flags & PKT_TX_UDP_TUNNEL_PKT)) {
+       if (ol_flags & PKT_TX_OUTER_IP_CKSUM) {
 
                *td_offset |= (outer_l2_len >> 1)
                                << I40E_TX_DESC_LENGTH_MACLEN_SHIFT;
@@ -492,7 +487,6 @@ i40e_txd_enable_checksum(uint64_t ol_flags,
                /* Now set the ctx descriptor fields */
                *cd_tunneling |= (outer_l3_len >> 2) <<
                                I40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT |
-                               I40E_TXD_CTX_UDP_TUNNELING |
                                (l2_len >> 1) <<
                                I40E_TXD_CTX_QW0_NATLEN_SHIFT;
 
@@ -501,7 +495,7 @@ i40e_txd_enable_checksum(uint64_t ol_flags,
                        << I40E_TX_DESC_LENGTH_MACLEN_SHIFT;
 
        /* Enable L3 checksum offloads */
-       if (ol_flags & PKT_TX_IPV4_CSUM) {
+       if (ol_flags & PKT_TX_IP_CKSUM) {
                *td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV4_CSUM;
                *td_offset |= (l3_len >> 2) << I40E_TX_DESC_LENGTH_IPLEN_SHIFT;
        } else if (ol_flags & PKT_TX_IPV4) {
@@ -619,7 +613,7 @@ check_rx_burst_bulk_alloc_preconditions(__rte_unused struct i40e_rx_queue *rxq)
                             "rxq->nb_rx_desc=%d",
                             rxq->rx_free_thresh, rxq->nb_rx_desc);
                ret = -EINVAL;
-       } else if (!(rxq->nb_rx_desc % rxq->rx_free_thresh) == 0) {
+       } else if (rxq->nb_rx_desc % rxq->rx_free_thresh != 0) {
                PMD_INIT_LOG(DEBUG, "Rx Burst Bulk Alloc Preconditions: "
                             "rxq->nb_rx_desc=%d, "
                             "rxq->rx_free_thresh=%d",
@@ -1160,8 +1154,7 @@ i40e_calc_context_desc(uint64_t flags)
 {
        uint64_t mask = 0ULL;
 
-       if (flags | PKT_TX_UDP_TUNNEL_PKT)
-               mask |= PKT_TX_UDP_TUNNEL_PKT;
+       mask |= PKT_TX_OUTER_IP_CKSUM;
 
 #ifdef RTE_LIBRTE_IEEE1588
        mask |= PKT_TX_IEEE1588_TMST;
@@ -1272,10 +1265,12 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
 
                /* Enable checksum offloading */
                cd_tunneling_params = 0;
-               i40e_txd_enable_checksum(ol_flags, &td_cmd, &td_offset,
-                                               l2_len, l3_len, outer_l2_len,
-                                               outer_l3_len,
-                                               &cd_tunneling_params);
+               if (unlikely(ol_flags & I40E_TX_CKSUM_OFFLOAD_MASK)) {
+                       i40e_txd_enable_checksum(ol_flags, &td_cmd, &td_offset,
+                               l2_len, l3_len, outer_l2_len,
+                               outer_l3_len,
+                               &cd_tunneling_params);
+               }
 
                if (unlikely(nb_ctx)) {
                        /* Setup TX context descriptor if required */
@@ -1303,6 +1298,18 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
                        ctx_txd->l2tag2 = rte_cpu_to_le_16(cd_l2tag2);
                        ctx_txd->type_cmd_tso_mss =
                                rte_cpu_to_le_64(cd_type_cmd_tso_mss);
+
+                       PMD_TX_LOG(DEBUG, "mbuf: %p, TCD[%u]:\n"
+                               "tunneling_params: %#x;\n"
+                               "l2tag2: %#hx;\n"
+                               "rsvd: %#hx;\n"
+                               "type_cmd_tso_mss: %#lx;\n",
+                               tx_pkt, tx_id,
+                               ctx_txd->tunneling_params,
+                               ctx_txd->l2tag2,
+                               ctx_txd->rsvd,
+                               ctx_txd->type_cmd_tso_mss);
+
                        txe->last_id = tx_last;
                        tx_id = txe->next_id;
                        txe = txn;
@@ -1320,6 +1327,16 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
                        /* Setup TX Descriptor */
                        slen = m_seg->data_len;
                        buf_dma_addr = RTE_MBUF_DATA_DMA_ADDR(m_seg);
+
+                       PMD_TX_LOG(DEBUG, "mbuf: %p, TDD[%u]:\n"
+                               "buf_dma_addr: %#"PRIx64";\n"
+                               "td_cmd: %#x;\n"
+                               "td_offset: %#x;\n"
+                               "td_len: %u;\n"
+                               "td_tag: %#x;\n",
+                               tx_pkt, tx_id, buf_dma_addr,
+                               td_cmd, td_offset, slen, td_tag);
+
                        txd->buffer_addr = rte_cpu_to_le_64(buf_dma_addr);
                        txd->cmd_type_offset_bsz = i40e_build_ctob(td_cmd,
                                                td_offset, slen, td_tag);