i40e: move to drivers/net/

[dpdk.git] / lib / librte_pmd_ixgbe / ixgbe / ixgbe_phy.c

diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_phy.c b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_phy.c
index 38c9909..4a3463a 100644 (file)
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_phy.c
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_phy.c
@@ -283,9 +283,7 @@ s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
        DEBUGFUNC("ixgbe_identify_phy_generic");
 
        if (!hw->phy.phy_semaphore_mask) {
-               hw->phy.lan_id = IXGBE_READ_REG(hw, IXGBE_STATUS) &
-                                               IXGBE_STATUS_LAN_ID_1;
-               if (hw->phy.lan_id)
+               if (hw->bus.lan_id)
                        hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM;
                else
                        hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM;
@@ -437,6 +435,9 @@ enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)
        case ATH_PHY_ID:
                phy_type = ixgbe_phy_nl;
                break;
+       case X557_PHY_ID:
+               phy_type = ixgbe_phy_x550em_ext_t;
+               break;
        default:
                phy_type = ixgbe_phy_unknown;
                break;
@@ -2550,3 +2551,33 @@ s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw)
 out:
        return status;
 }
+
+/**
+ * ixgbe_set_copper_phy_power - Control power for copper phy
+ * @hw: pointer to hardware structure
+ * @on: true for on, false for off
+ */
+s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on)
+{
+       u32 status;
+       u16 reg;
+
+       status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL,
+                                     IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,
+                                     &reg);
+       if (status)
+               return status;
+
+       if (on) {
+               reg &= ~IXGBE_MDIO_PHY_SET_LOW_POWER_MODE;
+       } else {
+               if (ixgbe_check_reset_blocked(hw))
+                       return 0;
+               reg |= IXGBE_MDIO_PHY_SET_LOW_POWER_MODE;
+       }
+
+       status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL,
+                                      IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,
+                                      reg);
+       return status;
+}