ixgbe/base: hook hardware address declaration
[dpdk.git] / lib / librte_pmd_ixgbe / ixgbe / ixgbe_type.h
index 6e60d70..90d807a 100644 (file)
@@ -74,6 +74,7 @@ POSSIBILITY OF SUCH DAMAGE.
 
 #include "ixgbe_osdep.h"
 
+/* Override this by setting IOMEM in your ixgbe_osdep.h header */
 
 /* Vendor ID */
 #define IXGBE_INTEL_VENDOR_ID                  0x8086
@@ -125,11 +126,12 @@ POSSIBILITY OF SUCH DAMAGE.
 #define IXGBE_DEV_ID_X540_VF                   0x1515
 #define IXGBE_DEV_ID_X540_VF_HV                        0x1530
 #define IXGBE_DEV_ID_X540T1                    0x1560
-#define IXGBE_DEV_ID_X550EM_X                  0x15A7
-#define IXGBE_DEV_ID_X550EM_X_SFP              0x15AC
 #define IXGBE_DEV_ID_X550T                     0x1563
 #define IXGBE_DEV_ID_X550EM_X_KX4              0x15AA
 #define IXGBE_DEV_ID_X550EM_X_KR               0x15AB
+#define IXGBE_DEV_ID_X550EM_X_SFP              0x15AC
+#define IXGBE_DEV_ID_X550EM_X_10G_T            0x15AD
+#define IXGBE_DEV_ID_X550EM_X_1G_T             0x15AE
 #define IXGBE_DEV_ID_X550_VF_HV                        0x1564
 #define IXGBE_DEV_ID_X550_VF                   0x1565
 #define IXGBE_DEV_ID_X550EM_X_VF               0x15A8
@@ -2762,6 +2764,9 @@ enum ixgbe_fdir_pballoc_type {
 #define IXGBE_HI_MAX_BLOCK_BYTE_LENGTH 1792 /* Num of bytes in range */
 #define IXGBE_HI_MAX_BLOCK_DWORD_LENGTH        448 /* Num of dwords in range */
 #define IXGBE_HI_COMMAND_TIMEOUT       500 /* Process HI command limit */
+#define IXGBE_HI_FLASH_ERASE_TIMEOUT   1000 /* Process Erase command limit */
+#define IXGBE_HI_FLASH_UPDATE_TIMEOUT  5000 /* Process Update command limit */
+#define IXGBE_HI_FLASH_APPLY_TIMEOUT   0 /* Process Apply command limit */
 
 /* CEM Support */
 #define FW_CEM_HDR_LEN                 0x4
@@ -2794,13 +2799,25 @@ struct ixgbe_hic_hdr {
        u8 checksum;
 };
 
-struct ixgbe_hic_hdr2 {
+struct ixgbe_hic_hdr2_req {
+       u8 cmd;
+       u8 buf_lenh;
+       u8 buf_lenl;
+       u8 checksum;
+};
+
+struct ixgbe_hic_hdr2_rsp {
        u8 cmd;
-       u8 buf_len1;
-       u8 buf_len2;
+       u8 buf_lenl;
+       u8 buf_lenh_status;     /* 7-5: high bits of buf_len, 4-0: status */
        u8 checksum;
 };
 
+union ixgbe_hic_hdr2 {
+       struct ixgbe_hic_hdr2_req req;
+       struct ixgbe_hic_hdr2_rsp rsp;
+};
+
 struct ixgbe_hic_drv_info {
        struct ixgbe_hic_hdr hdr;
        u8 port_num;
@@ -2814,7 +2831,7 @@ struct ixgbe_hic_drv_info {
 
 /* These need to be dword aligned */
 struct ixgbe_hic_read_shadow_ram {
-       struct ixgbe_hic_hdr2 hdr;
+       union ixgbe_hic_hdr2 hdr;
        u32 address;
        u16 length;
        u16 pad2;
@@ -2823,7 +2840,7 @@ struct ixgbe_hic_read_shadow_ram {
 };
 
 struct ixgbe_hic_write_shadow_ram {
-       struct ixgbe_hic_hdr2 hdr;
+       union ixgbe_hic_hdr2 hdr;
        u32 address;
        u16 length;
        u16 pad2;
@@ -3673,7 +3690,7 @@ struct ixgbe_mbx_info {
 };
 
 struct ixgbe_hw {
-       u8 *hw_addr;
+       u8 IOMEM *hw_addr;
        void *back;
        struct ixgbe_mac_info mac;
        struct ixgbe_addr_filter_info addr_ctrl;