ixgbe/base: new X557 phy

[dpdk.git] / lib / librte_pmd_ixgbe / ixgbe / ixgbe_type.h

diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_type.h b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_type.h
index 376f00c..ab244a1 100644 (file)
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_type.h
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_type.h
@@ -1374,6 +1374,7 @@ struct ixgbe_dmac_config {
 
 #define IXGBE_MDIO_AUTO_NEG_CONTROL    0x0 /* AUTO_NEG Control Reg */
 #define IXGBE_MDIO_AUTO_NEG_STATUS     0x1 /* AUTO_NEG Status Reg */
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STAT        0xC800 /* AUTO_NEG Vendor Status Reg */
 #define IXGBE_MDIO_AUTO_NEG_ADVT       0x10 /* AUTO_NEG Advt Reg */
 #define IXGBE_MDIO_AUTO_NEG_LP         0x13 /* AUTO_NEG LP Status Reg */
 #define IXGBE_MDIO_AUTO_NEG_EEE_ADVT   0x3C /* AUTO_NEG EEE Advt Reg */
@@ -1394,10 +1395,17 @@ struct ixgbe_dmac_config {
 #define IXGBE_MDIO_PHY_100BASETX_ABILITY       0x0080 /* 100BaseTX capable */
 #define IXGBE_MDIO_PHY_SET_LOW_POWER_MODE      0x0800 /* Set low power mode */
 
+#define IXGBE_MDIO_TX_VENDOR_ALARMS_3          0xCC02 /* Vendor Alarms 3 Reg */
+#define IXGBE_MDIO_TX_VENDOR_ALARMS_3_RST_MASK 0x3 /* PHY Reset Complete Mask */
+#define IXGBE_MDIO_GLOBAL_RES_PR_10 0xC479 /* Global Resv Provisioning 10 Reg */
+#define IXGBE_MDIO_POWER_UP_STALL              0x8000 /* Power Up Stall */
+
 #define IXGBE_MDIO_PMA_PMD_CONTROL_ADDR        0x0000 /* PMA/PMD Control Reg */
 #define IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR        0xC30A /* PHY_XS SDA/SCL Addr Reg */
 #define IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA        0xC30B /* PHY_XS SDA/SCL Data Reg */
 #define IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT        0xC30C /* PHY_XS SDA/SCL Status Reg */
+#define IXGBE_MDIO_PMD_STD_TX_DISABLE_CNTR 0x9 /* Standard Transmit Dis Reg */
+#define IXGBE_MDIO_PMD_GLOBAL_TX_DISABLE 0x0001 /* PMD Global Transmit Dis */
 
 #define IXGBE_PCRC8ECL         0x0E810 /* PCR CRC-8 Error Count Lo */
 #define IXGBE_PCRC8ECH         0x0E811 /* PCR CRC-8 Error Count Hi */
@@ -1408,6 +1416,21 @@ struct ixgbe_dmac_config {
 /* MII clause 22/28 definitions */
 #define IXGBE_MDIO_PHY_LOW_POWER_MODE  0x0800
 
+#define IXGBE_MDIO_XENPAK_LASI_STATUS          0x9005 /* XENPAK LASI Status register*/
+#define IXGBE_XENPAK_LASI_LINK_STATUS_ALARM    0x1 /* Link Status Alarm change */
+
+#define IXGBE_MDIO_AUTO_NEG_LINK_STATUS                0x4 /* Indicates if link is up */
+
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_MASK         0x7 /* Speed/Duplex Mask */
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10M_HALF     0x0 /* 10Mb/s Half Duplex */
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10M_FULL     0x1 /* 10Mb/s Full Duplex */
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_100M_HALF    0x2 /* 100Mb/s Half Duplex */
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_100M_FULL    0x3 /* 100Mb/s Full Duplex */
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB_HALF     0x4 /* 1Gb/s Half Duplex */
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB_FULL     0x5 /* 1Gb/s Full Duplex */
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB_HALF    0x6 /* 10Gb/s Half Duplex */
+#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB_FULL    0x7 /* 10Gb/s Full Duplex */
+
 #define IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG   0x20   /* 10G Control Reg */
 #define IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG 0xC400 /* 1G Provisioning 1 */
 #define IXGBE_MII_AUTONEG_XNP_TX_REG           0x17   /* 1G XNP Transmit */
@@ -1432,6 +1455,7 @@ struct ixgbe_dmac_config {
 #define TNX_FW_REV     0xB
 #define X540_PHY_ID    0x01540200
 #define X550_PHY_ID    0x01540220
+#define X557_PHY_ID    0x01540240
 #define AQ_FW_REV      0x20
 #define QT2022_PHY_ID  0x0043A400
 #define ATH_PHY_ID     0x03429050
@@ -3186,6 +3210,7 @@ enum ixgbe_phy_type {
        ixgbe_phy_aq,
        ixgbe_phy_x550em_kr,
        ixgbe_phy_x550em_kx4,
+       ixgbe_phy_x550em_ext_t,
        ixgbe_phy_cu_unknown,
        ixgbe_phy_qt,
        ixgbe_phy_xaui,
@@ -3536,6 +3561,7 @@ struct ixgbe_phy_operations {
        s32 (*read_reg_mdi)(struct ixgbe_hw *, u32, u32, u16 *);
        s32 (*write_reg_mdi)(struct ixgbe_hw *, u32, u32, u16);
        s32 (*setup_link)(struct ixgbe_hw *);
+       s32 (*setup_internal_link)(struct ixgbe_hw *);
        s32 (*setup_link_speed)(struct ixgbe_hw *, ixgbe_link_speed, bool);
        s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *);
        s32 (*get_firmware_version)(struct ixgbe_hw *, u16 *);
@@ -3606,7 +3632,6 @@ struct ixgbe_phy_info {
        u32 revision;
        enum ixgbe_media_type media_type;
        u32 phy_semaphore_mask;
-       u8 lan_id;
        bool reset_disable;
        ixgbe_autoneg_advertised autoneg_advertised;
        enum ixgbe_smart_speed smart_speed;