ixgbe/base: fix X550 check

[dpdk.git] / lib / librte_pmd_ixgbe / ixgbe / ixgbe_x550.c

diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x550.c b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x550.c
index 540b477..a8511a0 100644 (file)
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x550.c
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_x550.c
@@ -543,7 +543,7 @@ s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
                        break;
        }
 
-       if ((command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) != 0) {
+       if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
                error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >>
                         IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT;
                ERROR_REPORT2(IXGBE_ERROR_POLLING,
@@ -591,7 +591,7 @@ s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
                        break;
        }
 
-       if ((command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) != 0) {
+       if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
                error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >>
                         IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT;
                ERROR_REPORT2(IXGBE_ERROR_POLLING,
@@ -789,6 +789,7 @@ s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
 {
        bool setup_linear;
        u16 reg_slice, edc_mode;
+       s32 ret_val;
 
        DEBUGFUNC("ixgbe_setup_sfp_modules_X550em");
 
@@ -819,7 +820,7 @@ s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
        hw->phy.ops.reset = NULL;
 
        /* The CS4227 slice address is the base address + the port-pair reg
-        * offset. I.e. Slice 0 = 0x0000 and slice 1 = 0x1000.
+        * offset. I.e. Slice 0 = 0x12B0 and slice 1 = 0x22B0.
         */
        reg_slice = IXGBE_CS4227_SPARE24_LSB + (hw->phy.lan_id << 12);
 
@@ -829,8 +830,14 @@ s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)
                edc_mode = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
 
        /* Configure CS4227 for connection type. */
-       return hw->phy.ops.write_i2c_combined(hw, IXGBE_CS4227,
-                                             reg_slice, edc_mode);
+       ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+                                          edc_mode);
+
+       if (ret_val != IXGBE_SUCCESS)
+               ret_val = ixgbe_write_i2c_combined(hw, 0x80, reg_slice,
+                                                  edc_mode);
+
+       return ret_val;
 }
 
 /**
@@ -882,13 +889,13 @@ s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
 
                /* Link capabilities are based on SFP */
                if (hw->phy.multispeed_fiber)
-                       *speed |= IXGBE_LINK_SPEED_10GB_FULL |
-                                 IXGBE_LINK_SPEED_1GB_FULL;
+                       *speed = IXGBE_LINK_SPEED_10GB_FULL |
+                                IXGBE_LINK_SPEED_1GB_FULL;
                else
                        *speed = IXGBE_LINK_SPEED_10GB_FULL;
        } else {
-               *speed |= IXGBE_LINK_SPEED_10GB_FULL |
-                         IXGBE_LINK_SPEED_1GB_FULL;
+               *speed = IXGBE_LINK_SPEED_10GB_FULL |
+                        IXGBE_LINK_SPEED_1GB_FULL;
                *autoneg = true;
        }
 
@@ -1060,6 +1067,8 @@ s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw)
        status = ixgbe_read_iosf_sb_reg_x550(hw,
                IXGBE_KRM_LINK_CTRL_1(hw->phy.lan_id),
                IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);
+       if (status)
+               return status;
 
        reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
        reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ;