{
bool setup_linear;
u16 reg_slice, edc_mode;
+ s32 ret_val;
DEBUGFUNC("ixgbe_setup_sfp_modules_X550em");
hw->phy.ops.reset = NULL;
/* The CS4227 slice address is the base address + the port-pair reg
- * offset. I.e. Slice 0 = 0x0000 and slice 1 = 0x1000.
+ * offset. I.e. Slice 0 = 0x12B0 and slice 1 = 0x22B0.
*/
reg_slice = IXGBE_CS4227_SPARE24_LSB + (hw->phy.lan_id << 12);
edc_mode = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
/* Configure CS4227 for connection type. */
- return hw->phy.ops.write_i2c_combined(hw, IXGBE_CS4227,
- reg_slice, edc_mode);
+ ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
+ edc_mode);
+
+ if (ret_val != IXGBE_SUCCESS)
+ ret_val = ixgbe_write_i2c_combined(hw, 0x80, reg_slice,
+ edc_mode);
+
+ return ret_val;
}
/**
/* Link capabilities are based on SFP */
if (hw->phy.multispeed_fiber)
- *speed |= IXGBE_LINK_SPEED_10GB_FULL |
- IXGBE_LINK_SPEED_1GB_FULL;
+ *speed = IXGBE_LINK_SPEED_10GB_FULL |
+ IXGBE_LINK_SPEED_1GB_FULL;
else
*speed = IXGBE_LINK_SPEED_10GB_FULL;
} else {
- *speed |= IXGBE_LINK_SPEED_10GB_FULL |
- IXGBE_LINK_SPEED_1GB_FULL;
+ *speed = IXGBE_LINK_SPEED_10GB_FULL |
+ IXGBE_LINK_SPEED_1GB_FULL;
*autoneg = true;
}
status = ixgbe_read_iosf_sb_reg_x550(hw,
IXGBE_KRM_LINK_CTRL_1(hw->phy.lan_id),
IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val);
+ if (status)
+ return status;
reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ;