ixgbe: support X540 VF

[dpdk.git] / lib / librte_pmd_ixgbe / ixgbe_bypass_api.h

diff --git a/lib/librte_pmd_ixgbe/ixgbe_bypass_api.h b/lib/librte_pmd_ixgbe/ixgbe_bypass_api.h
index 1498c85..b4a7386 100644 (file)
--- a/lib/librte_pmd_ixgbe/ixgbe_bypass_api.h
+++ b/lib/librte_pmd_ixgbe/ixgbe_bypass_api.h
@@ -1,13 +1,13 @@
 /*-
  *   BSD LICENSE
- * 
- *   Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
+ *
+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
  *   All rights reserved.
- * 
+ *
  *   Redistribution and use in source and binary forms, with or without
  *   modification, are permitted provided that the following conditions
  *   are met:
- * 
+ *
  *     * Redistributions of source code must retain the above copyright
  *       notice, this list of conditions and the following disclaimer.
  *     * Redistributions in binary form must reproduce the above copyright
@@ -17,7 +17,7 @@
  *     * Neither the name of Intel Corporation nor the names of its
  *       contributors may be used to endorse or promote products derived
  *       from this software without specific prior written permission.
- * 
+ *
  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
@@ -76,6 +76,15 @@ static s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status)
                dir_sdi = IXGBE_ESDP_SDP0_DIR;
                dir_sdo = IXGBE_ESDP_SDP1_DIR;
                break;
+       case ixgbe_mac_X550:
+       case ixgbe_mac_X550EM_x:
+               sck = IXGBE_ESDP_SDP2;
+               sdi = IXGBE_ESDP_SDP0;
+               sdo = IXGBE_ESDP_SDP1;
+               dir_sck = IXGBE_ESDP_SDP2_DIR;
+               dir_sdi = IXGBE_ESDP_SDP0_DIR;
+               dir_sdo = IXGBE_ESDP_SDP1_DIR;
+               break;
        default:
                return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
        }
@@ -155,7 +164,7 @@ static s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status)
  *
  * If we send a write we can't be sure it took until we can read back
  * that same register.  It can be a problem as some of the feilds may
- * for valid reasons change inbetween the time wrote the register and
+ * for valid reasons change between the time wrote the register and
  * we read it again to verify.  So this function check everything we
  * can check and then assumes it worked.
  *
@@ -254,7 +263,7 @@ static s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,
 }
 
 /**
- *  ixgbe_bypass_rd_eep_generic - Read the bypass FW eeprom addres.
+ *  ixgbe_bypass_rd_eep_generic - Read the bypass FW eeprom address.
  *
  *  @hw: pointer to hardware structure
  *  @addr: The bypass eeprom address to read.