net/axgbe: toggle PLL settings during rate change

[dpdk.git] / lib / power / meson.build

diff --git a/lib/power/meson.build b/lib/power/meson.build
index a2cc9fe..ba8d660 100644 (file)
--- a/lib/power/meson.build
+++ b/lib/power/meson.build
@@ -1,6 +1,12 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2017 Intel Corporation
 
+if is_windows
+    build = false
+    reason = 'not supported on Windows'
+    subdir_done()
+endif
+
 if not is_linux
     build = false
     reason = 'only supported on Linux'
@@ -9,6 +15,7 @@ sources = files(
         'guest_channel.c',
         'power_acpi_cpufreq.c',
         'power_common.c',
+        'power_cppc_cpufreq.c',
         'power_kvm_vm.c',
         'power_pstate_cpufreq.c',
         'rte_power.c',
@@ -19,6 +26,9 @@ headers = files(
         'rte_power.h',
         'rte_power_empty_poll.h',
         'rte_power_pmd_mgmt.h',
-        'rte_power_guest_channel.h'
+        'rte_power_guest_channel.h',
 )
+if cc.has_argument('-Wno-cast-qual')
+    cflags += '-Wno-cast-qual'
+endif
 deps += ['timer', 'ethdev']