config: clean cache line size selection scheme

[dpdk.git] / mk / arch / arm / rte.vars.mk

diff --git a/mk/arch/arm/rte.vars.mk b/mk/arch/arm/rte.vars.mk
index df0c043..bd85140 100644 (file)
--- a/mk/arch/arm/rte.vars.mk
+++ b/mk/arch/arm/rte.vars.mk
@@ -32,7 +32,7 @@
 ARCH  ?= arm
 CROSS ?=
 
-CPU_CFLAGS  ?= -marm -DRTE_CACHE_LINE_SIZE=64 -munaligned-access
+CPU_CFLAGS  ?= -marm -munaligned-access
 CPU_LDFLAGS ?=
 CPU_ASFLAGS ?= -felf