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(parent: a3fd191) | patch
net/mlx5: check max SIMD bitwidth
authorCiara Power <ciara.power@intel.com>
Mon, 19 Oct 2020 13:48:51 +0000 (15:48 +0200)
committerDavid Marchand <david.marchand@redhat.com>
Mon, 19 Oct 2020 14:45:02 +0000 (16:45 +0200)
commit2c5e0dd21f3aa7e352f8842b46f807f65ffda37f
tree1058ca54a3515a25ba7bed538aeb39989a939f7atree | snapshot
parenta3fd191a413d6c358151cdf5b1b7c376f08b054bcommit | diff
net/mlx5: check max SIMD bitwidth

When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU enabled
path.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
drivers/net/mlx5/mlx5_rxtx_vec.c diff | blob | history
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