net/mlx5: create relaxed ordering memory regions
authorShiri Kuzin <shirik@mellanox.com>
Tue, 24 Mar 2020 11:39:39 +0000 (13:39 +0200)
committerFerruh Yigit <ferruh.yigit@intel.com>
Tue, 21 Apr 2020 11:57:05 +0000 (13:57 +0200)
commit53ac93f71ad152156d84241c5ee0e1a0d0321378
tree890f60c13409dba7703244797eb2231e5dfcd257
parenta386116c200911637ddd1850264353ac14cc707c
net/mlx5: create relaxed ordering memory regions

In the current state, when preforming read/write
transactions we must wait for a completion in order
to run the next transaction, and all transactions are
performed by order.

Relaxed Ordering is a PCI optimization which by enabling it
we allow the system to perform read/writes in a different
order without having to wait for completion and improve
the performance in that matter.

This commit introduces the creation of relaxed ordering
memory regions in mlx5.
As relaxed ordering is an optimization, drivers that
do not support it can simply ignore it and therefore
it is enabled by default.

Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
doc/guides/rel_notes/release_20_05.rst
drivers/common/mlx5/mlx5_devx_cmds.c
drivers/common/mlx5/mlx5_devx_cmds.h
drivers/common/mlx5/mlx5_glue.h
drivers/common/mlx5/mlx5_prm.h
drivers/net/mlx5/mlx5_flow_dv.c
drivers/net/mlx5/mlx5_mr.c
drivers/vdpa/mlx5/mlx5_vdpa_lm.c
drivers/vdpa/mlx5/mlx5_vdpa_mem.c