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(parent: 5cda50e) | patch
net/e1000/base: clear ULP configuration register on ULP exit
authorWenzhuo Lu <wenzhuo.lu@intel.com>
Wed, 23 Nov 2016 17:22:52 +0000 (12:22 -0500)
committerFerruh Yigit <ferruh.yigit@intel.com>
Tue, 17 Jan 2017 18:36:48 +0000 (19:36 +0100)
commit5d55afe895ed54a6d56337fd5e5744466eb86b9f
tree5df2ed76f2d27efdc68cf4eebf45791a7d864a5etree | snapshot
parent5cda50e8670180ce3123f6917d7025b220a07752commit | diff
net/e1000/base: clear ULP configuration register on ULP exit

There are some client PHY Ultra Low Power (ULP) register bits that are
configured by the Manageability Engine (ME) FW.

The driver must ensure that these bits are cleared on exit from ULP.
Ordinarily the ME FW would do that, but there are cases in which the
FW is not present, and the driver must handle that.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
drivers/net/e1000/base/e1000_ich8lan.c diff | blob | history
drivers/net/e1000/base/e1000_ich8lan.h diff | blob | history
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