net/mlx5: fix NIC egress flow mismatch in switchdev mode

net/mlx5: fix NIC egress flow mismatch in switchdev mode

When E-Switch mode was enabled, the NIC egress flows was implicitly
appended with source vport to match on. If the metadata register C0
was used to maintain the source vport, it was initialized to zero
on packet steering engine entry, the flow could be hit only
if source vport was zero, the register C0 of the packet was not correct
to match in the TX side, this caused egress flow misses.

This patch:
 - removes the implicit source vport match for NIC egress flow.
 - rejects the NIC egress flows on the representor ports at validation.
 - allows the internal NIC egress flows containing the TX_QUEUE items in
   order to not impact hairpins.

Fixes: ce777b147bf8 ("net/mlx5: fix E-Switch flow without port item")
Cc: stable@dpdk.org
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>