config: clean cache line size selection scheme
authorJerin Jacob <jerin.jacob@caviumnetworks.com>
Mon, 7 Dec 2015 14:22:50 +0000 (19:52 +0530)
committerThomas Monjalon <thomas.monjalon@6wind.com>
Thu, 11 Feb 2016 11:45:35 +0000 (12:45 +0100)
commit6e757e69425a5e74b72be50a8ecc230c1d51b569
tree1613380d42db20f730e0046a0c69673edc741887
parent94e4b3a60765c26895c17d8c12c5790b16384602
config: clean cache line size selection scheme

by default, all the targets will be configured with the 64-byte cache line
size, targets which have different cache line size can be overridden
through target specific config file.

Selected ThunderX and power8 as CONFIG_RTE_CACHE_LINE_SIZE=128 targets
based on existing configuration.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
config/common_bsdapp
config/common_linuxapp
config/defconfig_arm64-armv8a-linuxapp-gcc
config/defconfig_ppc_64-power8-linuxapp-gcc
lib/librte_eal/common/include/rte_memory.h
lib/librte_eal/linuxapp/eal/include/exec-env/rte_kni_common.h
mk/arch/arm/rte.vars.mk
mk/arch/ppc_64/rte.vars.mk
mk/machine/armv8a/rte.vars.mk
mk/machine/thunderx/rte.vars.mk
mk/machine/xgene1/rte.vars.mk