crypto/nitrox: fix CSR register address generation
authorNagadheeraj Rottela <rnagadheeraj@marvell.com>
Fri, 27 Mar 2020 13:42:38 +0000 (19:12 +0530)
committerAkhil Goyal <akhil.goyal@oss.nxp.com>
Sun, 5 Apr 2020 16:35:34 +0000 (18:35 +0200)
commit76522b25b15316400aab26cc8187e19397998f53
tree84971a3bb78318c0f8f66fa186e88f0e3b2a9732
parenta1598e90f353b609df41b077c59dbd1f378d23c0
crypto/nitrox: fix CSR register address generation

If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will
evaluate to incorrect values due to unintended sign extension from int
to unsigned long. To fix this, add UL suffix to the constants in these
macros. The same problem is with AQMQ_QSZX() macro also.

Coverity issue: 349899, 349905, 349911, 349921, 349923
Fixes: 32e4930d5a3b ("crypto/nitrox: add hardware queue management")
Fixes: 0a8fc2423bff ("crypto/nitrox: introduce Nitrox driver")
Cc: stable@dpdk.org
Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
drivers/crypto/nitrox/nitrox_csr.h