]> git.droids-corp.org - dpdk.git/commit
net/mlx5: fix inline length for multi-segment TSO
authorDariusz Sosnowski <dsosnowski@nvidia.com>
Mon, 7 Feb 2022 15:48:56 +0000 (17:48 +0200)
committerRaslan Darawsheh <rasland@nvidia.com>
Thu, 10 Feb 2022 08:44:34 +0000 (09:44 +0100)
commit864678e420f00225572be476559a087bfecaafbf
treeb507e2d3f05ed389b85c39767d4fd3d9879bde4e
parenteb11edd9dbe0b0c18c60cef03472e48075ca0f7c
net/mlx5: fix inline length for multi-segment TSO

This patch removes a redundant assert in mlx5_tx_packet_multi_tso().
That assert assured that the amount of bytes requested to be inlined
is greater than or equal to the minimum amount of bytes required
to be inlined. This requirement is either derived from the NIC
inlining mode or configured through devargs. When using TSO this
requirement can be disregarded, because on all NICs it is satisfied by
TSO inlining requirements, since TSO requires L2, L3, and L4 headers to
be inlined.

Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org
Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
drivers/net/mlx5/mlx5_tx.h